Search

Andrew W. Chriss

Supervisory Patent Examiner (ID: 3398, Phone: (571)272-1774 , Office: P/2479 )

Most Active Art Unit
2472
Art Unit(s)
2419, 2472, 2609, 2479, 2619, 2400, 2416
Total Applications
328
Issued Applications
163
Pending Applications
87
Abandoned Applications
81

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19686329 [patent_doc_number] => 20250004874 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => METHOD FOR ACCESSING A DATA BLOCK, STORED IN A MEMORY UNIT OF A COMPUTING UNIT, OF A NUMBER OF DATA BLOCKS [patent_app_type] => utility [patent_app_number] => 18/749984 [patent_app_country] => US [patent_app_date] => 2024-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10577 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18749984 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/749984
Method for accessing a data block, stored in a memory unit of a computing unit, of a number of data blocks Jun 20, 2024 Issued
Array ( [id] => 19878573 [patent_doc_number] => 20250110830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-03 [patent_title] => APPARATUSES AND METHODS FOR ALTERNATE MEMORY DIE METADATA STORAGE [patent_app_type] => utility [patent_app_number] => 18/747676 [patent_app_country] => US [patent_app_date] => 2024-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9902 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18747676 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/747676
Apparatuses and methods for alternate memory die metadata storage Jun 18, 2024 Issued
Array ( [id] => 19645016 [patent_doc_number] => 20240419536 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => MEMORY CONTROLLER AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/743554 [patent_app_country] => US [patent_app_date] => 2024-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14295 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18743554 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/743554
Memory controller and memory system Jun 13, 2024 Issued
Array ( [id] => 19466417 [patent_doc_number] => 20240320087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => Data Error Correction Method and Apparatus, Memory Controller, and System [patent_app_type] => utility [patent_app_number] => 18/735483 [patent_app_country] => US [patent_app_date] => 2024-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6404 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18735483 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/735483
Data error correction method and apparatus, memory controller, and system Jun 5, 2024 Issued
Array ( [id] => 20758127 [patent_doc_number] => 12650897 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2026-06-09 [patent_title] => Memory device control method and apparatus, electronic device, and storage medium [patent_app_type] => utility [patent_app_number] => 19/129625 [patent_app_country] => US [patent_app_date] => 2024-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 7638 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19129625 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/129625
Memory device control method and apparatus, electronic device, and storage medium Jun 4, 2024 Issued
Array ( [id] => 20410489 [patent_doc_number] => 20250379598 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-11 [patent_title] => ADAPTIVE GENERALIZED CONCATENATED CODES FOR LOW POWER ECC WITH VARYING OVERHEAD [patent_app_type] => utility [patent_app_number] => 18/734663 [patent_app_country] => US [patent_app_date] => 2024-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17570 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18734663 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/734663
Adaptive generalized concatenated codes for low power ECC with varying overhead Jun 4, 2024 Issued
Array ( [id] => 20123284 [patent_doc_number] => 20250238315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => SEMICONDUCTOR MEMORY APPARATUS CONFIGURED TO PERFORM AN ERROR CHECK [patent_app_type] => utility [patent_app_number] => 18/733308 [patent_app_country] => US [patent_app_date] => 2024-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10172 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18733308 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/733308
SEMICONDUCTOR MEMORY APPARATUS CONFIGURED TO PERFORM AN ERROR CHECK Jun 3, 2024 Pending
Array ( [id] => 20550409 [patent_doc_number] => 12561202 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-24 [patent_title] => Enforced checksums for human readable prime number compression (HRPNC) [patent_app_type] => utility [patent_app_number] => 18/678360 [patent_app_country] => US [patent_app_date] => 2024-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 17521 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18678360 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/678360
Enforced checksums for human readable prime number compression (HRPNC) May 29, 2024 Issued
Array ( [id] => 20550407 [patent_doc_number] => 12561200 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-24 [patent_title] => Read data path [patent_app_type] => utility [patent_app_number] => 18/670167 [patent_app_country] => US [patent_app_date] => 2024-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10919 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18670167 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/670167
Read data path May 20, 2024 Issued
Array ( [id] => 20805161 [patent_doc_number] => 12670068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-30 [patent_title] => System and method of encoding data for performing vector calculations in raid storage systems [patent_app_type] => utility [patent_app_number] => 18/666746 [patent_app_country] => US [patent_app_date] => 2024-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 0 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18666746 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/666746
SYSTEM AND METHOD OF ENCODING DATA FOR PERFORMING VECTOR CALCULATIONS IN RAID STORAGE SYSTEMS May 15, 2024 Issued
Array ( [id] => 19588748 [patent_doc_number] => 20240386305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => PASSIVELY PROTECTED QUANTUM MEMORY AND OPERATING A PASSIVELY PROTECTED QUANTUM MEMORY IN TWO DIMENSIONS [patent_app_type] => utility [patent_app_number] => 18/663156 [patent_app_country] => US [patent_app_date] => 2024-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27369 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18663156 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/663156
Passively protected quantum memory and operating a passively protected quantum memory in two dimensions May 13, 2024 Issued
Array ( [id] => 20145651 [patent_doc_number] => 12379993 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-05 [patent_title] => Memory bank protection [patent_app_type] => utility [patent_app_number] => 18/660954 [patent_app_country] => US [patent_app_date] => 2024-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4646 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18660954 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/660954
Memory bank protection May 9, 2024 Issued
Array ( [id] => 20027121 [patent_doc_number] => 20250165343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => MEMORY DEVICE THAT CHANGES TYPE OF CODEWORD STORED IN MEMORY AREA AND METHOD FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/653742 [patent_app_country] => US [patent_app_date] => 2024-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18653742 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/653742
Memory device that changes type of codeword stored in memory area and method for operating the same May 1, 2024 Issued
Array ( [id] => 19405708 [patent_doc_number] => 20240289219 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => METHODS FOR ERROR COUNT REPORTING WITH SCALED ERROR COUNT INFORMATION, AND MEMORY DEVICES EMPLOYING THE SAME [patent_app_type] => utility [patent_app_number] => 18/652714 [patent_app_country] => US [patent_app_date] => 2024-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4074 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18652714 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/652714
Methods for error count reporting with scaled error count information, and memory devices employing the same Apr 30, 2024 Issued
Array ( [id] => 20609937 [patent_doc_number] => 12585539 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-24 [patent_title] => Storage network for storage of data object sets with a common trait [patent_app_type] => utility [patent_app_number] => 18/652274 [patent_app_country] => US [patent_app_date] => 2024-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 63 [patent_figures_cnt] => 70 [patent_no_of_words] => 39016 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18652274 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/652274
Storage network for storage of data object sets with a common trait Apr 30, 2024 Issued
Array ( [id] => 19393696 [patent_doc_number] => 20240283566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => Data Processing Method and Device [patent_app_type] => utility [patent_app_number] => 18/651185 [patent_app_country] => US [patent_app_date] => 2024-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12503 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18651185 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/651185
Data processing method and device Apr 29, 2024 Issued
Array ( [id] => 19393595 [patent_doc_number] => 20240283465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => CODING METHOD, DECODING METHOD, AND COMMUNICATIONS APPARATUS [patent_app_type] => utility [patent_app_number] => 18/649379 [patent_app_country] => US [patent_app_date] => 2024-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22592 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18649379 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/649379
Coding method, decoding method, and communications apparatus Apr 28, 2024 Issued
Array ( [id] => 19758742 [patent_doc_number] => 20250047307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => SYSTEM AND METHOD FOR LOW DENSITY PARITY CHECK (LDPC) CODE WITH 2/3 CODE RATE [patent_app_type] => utility [patent_app_number] => 18/647759 [patent_app_country] => US [patent_app_date] => 2024-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14979 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18647759 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/647759
SYSTEM AND METHOD FOR LOW DENSITY PARITY CHECK (LDPC) CODE WITH 2/3 CODE RATE Apr 25, 2024 Pending
Array ( [id] => 19362831 [patent_doc_number] => 20240264865 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => LEVEL TWO FIRST-IN-FIRST-OUT TRANSMISSION [patent_app_type] => utility [patent_app_number] => 18/641544 [patent_app_country] => US [patent_app_date] => 2024-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15555 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18641544 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/641544
LEVEL TWO FIRST-IN-FIRST-OUT TRANSMISSION Apr 21, 2024 Pending
Array ( [id] => 20311176 [patent_doc_number] => 20250328805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-23 [patent_title] => MEASUREMENT-BASED QUBIT BENCHMARKING [patent_app_type] => utility [patent_app_number] => 18/641037 [patent_app_country] => US [patent_app_date] => 2024-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7195 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18641037 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/641037
MEASUREMENT-BASED QUBIT BENCHMARKING Apr 18, 2024 Pending
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