
Andrew W. Chriss
Supervisory Patent Examiner (ID: 3398, Phone: (571)272-1774 , Office: P/2479 )
| Most Active Art Unit | 2472 |
| Art Unit(s) | 2419, 2472, 2609, 2479, 2619, 2400, 2416 |
| Total Applications | 328 |
| Issued Applications | 163 |
| Pending Applications | 87 |
| Abandoned Applications | 81 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10478252
[patent_doc_number] => 20150363269
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-17
[patent_title] => 'ERASURE CODING AND REPLICATION IN STORAGE CLUSTERS'
[patent_app_type] => utility
[patent_app_number] => 14/834017
[patent_app_country] => US
[patent_app_date] => 2015-08-24
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/834017 | Erasure coding and replication in storage clusters | Aug 23, 2015 | Issued |
Array
(
[id] => 10702191
[patent_doc_number] => 20160048338
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[patent_kind] => A1
[patent_issue_date] => 2016-02-18
[patent_title] => 'MEMORY BLOCK QUALITY IDENTIFICATION IN A MEMORY'
[patent_app_type] => utility
[patent_app_number] => 14/833849
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/833849 | Memory block quality identification in a memory | Aug 23, 2015 | Issued |
Array
(
[id] => 10697686
[patent_doc_number] => 20160043832
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-02-11
[patent_title] => 'SECURE COMMUNICATION METHOD AND SYSTEM BASED ON BIT ERROR PROBABILITY'
[patent_app_type] => utility
[patent_app_number] => 14/820457
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[patent_app_date] => 2015-08-06
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/820457 | Secure communication method and system based on bit error probability | Aug 5, 2015 | Issued |
Array
(
[id] => 11222352
[patent_doc_number] => 09450702
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[patent_issue_date] => 2016-09-20
[patent_title] => 'Method and apparatus for transmitting and receiving packet in a communication system'
[patent_app_type] => utility
[patent_app_number] => 14/811068
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Array
(
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[patent_doc_number] => 09710327
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[patent_issue_date] => 2017-07-18
[patent_title] => 'Flash memory system and operating method thereof'
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Array
(
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[patent_issue_date] => 2017-01-19
[patent_title] => 'Systems and Methods for Retaining Non-Converged Data Sets for Additional Processing'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/800742 | Systems and methods for retaining non-converged data sets for additional processing | Jul 15, 2015 | Issued |
Array
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[patent_title] => 'Storage device including error correction decoder and operating method of error correction decoder'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/800012 | Storage device including error correction decoder and operating method of error correction decoder | Jul 14, 2015 | Issued |
Array
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[id] => 11832526
[patent_doc_number] => 09729279
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[patent_issue_date] => 2017-08-08
[patent_title] => 'Packet transmission and reception system, apparatus, and method'
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Array
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[patent_issue_date] => 2017-09-19
[patent_title] => 'Semiconductor memory devices and memory systems including the same'
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Array
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[patent_issue_date] => 2017-05-23
[patent_title] => 'Method and apparatus for broadcast information reception in wireless communication systems'
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[patent_app_number] => 14/797671
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/797671 | Method and apparatus for broadcast information reception in wireless communication systems | Jul 12, 2015 | Issued |
Array
(
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[patent_title] => 'Memory system, method for controlling magnetic memory, and device for controlling magnetic memory'
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Array
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[patent_title] => 'Minimum latency link layer metaframing and error correction'
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Array
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[patent_title] => 'PARITY CHECK MATRIX GENERATING METHOD, ENCODING APPARATUS, ENCODING METHOD, DECODING APPARATUS AND DECODING METHOD USING THE SAME'
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Array
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Array
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[patent_title] => 'DATA STORAGE DEVICE AND OPERATING METHOD THEREOF'
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Array
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Array
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[patent_title] => 'METHODS, DEVICES, AND SYSTEMS FOR DATA SENSING'
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Array
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Array
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Array
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