Search

Andrew W. Chriss

Supervisory Patent Examiner (ID: 3398, Phone: (571)272-1774 , Office: P/2479 )

Most Active Art Unit
2472
Art Unit(s)
2419, 2472, 2609, 2479, 2619, 2400, 2416
Total Applications
328
Issued Applications
163
Pending Applications
87
Abandoned Applications
81

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20389122 [patent_doc_number] => 12488855 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-02 [patent_title] => Fail classification device for plurality of memory cells and method thereof [patent_app_type] => utility [patent_app_number] => 18/638563 [patent_app_country] => US [patent_app_date] => 2024-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 1173 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18638563 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/638563
Fail classification device for plurality of memory cells and method thereof Apr 16, 2024 Issued
Array ( [id] => 19851455 [patent_doc_number] => 20250096806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => ERROR DETECTORS AND MEMORY DEVICES HAVING ERROR DETECTORS THEREIN, AND METHODS OF PERFORMING ERROR DETECTION [patent_app_type] => utility [patent_app_number] => 18/636706 [patent_app_country] => US [patent_app_date] => 2024-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14095 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18636706 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/636706
ERROR DETECTORS AND MEMORY DEVICES HAVING ERROR DETECTORS THEREIN, AND METHODS OF PERFORMING ERROR DETECTION Apr 15, 2024 Issued
Array ( [id] => 19350173 [patent_doc_number] => 20240259137 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => INFORMATION INDICATION METHOD, NETWORK DEVICE, TERMINAL, CHIP, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 18/629241 [patent_app_country] => US [patent_app_date] => 2024-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18530 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18629241 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/629241
INFORMATION INDICATION METHOD, NETWORK DEVICE, TERMINAL, CHIP, AND STORAGE MEDIUM Apr 7, 2024 Pending
Array ( [id] => 20281831 [patent_doc_number] => 20250307073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => DATA ENCODING METHOD FOR 3D NAND FLASH MEMORY [patent_app_type] => utility [patent_app_number] => 18/624970 [patent_app_country] => US [patent_app_date] => 2024-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9060 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18624970 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/624970
Data encoding method for 3D NAND flash memory Apr 1, 2024 Issued
Array ( [id] => 20228493 [patent_doc_number] => 12417145 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-16 [patent_title] => Decoding parameter updating method, memory storage device, and memory control circuit unit [patent_app_type] => utility [patent_app_number] => 18/624125 [patent_app_country] => US [patent_app_date] => 2024-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4497 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18624125 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/624125
Decoding parameter updating method, memory storage device, and memory control circuit unit Apr 1, 2024 Issued
Array ( [id] => 20507150 [patent_doc_number] => 12541426 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-03 [patent_title] => Memory device with error correction code [patent_app_type] => utility [patent_app_number] => 18/623038 [patent_app_country] => US [patent_app_date] => 2024-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18623038 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/623038
Memory device with error correction code Mar 31, 2024 Issued
Array ( [id] => 20130971 [patent_doc_number] => 12373284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Method for accessing flash memory module and associated flash memory controller and electronic device [patent_app_type] => utility [patent_app_number] => 18/621069 [patent_app_country] => US [patent_app_date] => 2024-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18621069 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/621069
Method for accessing flash memory module and associated flash memory controller and electronic device Mar 27, 2024 Issued
Array ( [id] => 19320248 [patent_doc_number] => 20240241792 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => ON-SSD ERASURE CODING WITH UNI-DIRECTIONAL COMMANDS [patent_app_type] => utility [patent_app_number] => 18/618965 [patent_app_country] => US [patent_app_date] => 2024-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12815 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18618965 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/618965
ON-SSD erasure coding with uni-directional commands Mar 26, 2024 Issued
Array ( [id] => 20161938 [patent_doc_number] => 12388580 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Base station, terminal, and communication method [patent_app_type] => utility [patent_app_number] => 18/617114 [patent_app_country] => US [patent_app_date] => 2024-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 4675 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18617114 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/617114
Base station, terminal, and communication method Mar 25, 2024 Issued
Array ( [id] => 20441340 [patent_doc_number] => 12512180 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-30 [patent_title] => Method and system for repairing a dynamic random access memory (dram) of memory device [patent_app_type] => utility [patent_app_number] => 18/614954 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3655 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18614954 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/614954
Method and system for repairing a dynamic random access memory (dram) of memory device Mar 24, 2024 Issued
Array ( [id] => 19482063 [patent_doc_number] => 20240330105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => DYNAMICALLY CONFIGURABLE LOW DENSITY PARITY CHECK CODE [patent_app_type] => utility [patent_app_number] => 18/615592 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13664 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18615592 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/615592
DYNAMICALLY CONFIGURABLE LOW DENSITY PARITY CHECK CODE Mar 24, 2024 Issued
Array ( [id] => 20550410 [patent_doc_number] => 12561203 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-24 [patent_title] => Memory system for performing read reclaim [patent_app_type] => utility [patent_app_number] => 18/610279 [patent_app_country] => US [patent_app_date] => 2024-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6864 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18610279 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/610279
Memory system for performing read reclaim Mar 19, 2024 Issued
Array ( [id] => 19434660 [patent_doc_number] => 20240303158 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => ERROR CORRECTION MEMORY DEVICE WITH FAST DATA ACCESS [patent_app_type] => utility [patent_app_number] => 18/604227 [patent_app_country] => US [patent_app_date] => 2024-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23409 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18604227 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/604227
Error correction memory device with fast data access Mar 12, 2024 Issued
Array ( [id] => 20623975 [patent_doc_number] => 12591483 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-31 [patent_title] => System and method for protecting data [patent_app_type] => utility [patent_app_number] => 18/595177 [patent_app_country] => US [patent_app_date] => 2024-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18595177 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/595177
System and method for protecting data Mar 3, 2024 Issued
Array ( [id] => 20051360 [patent_doc_number] => 20250189582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => SELF-FUNCTIONAL DETECTION SYSTEM FOR TAP CONTROLLER AND METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/592287 [patent_app_country] => US [patent_app_date] => 2024-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 410 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18592287 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/592287
Self-functional detection system for tap controller and method thereof Feb 28, 2024 Issued
Array ( [id] => 19466427 [patent_doc_number] => 20240320097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/590217 [patent_app_country] => US [patent_app_date] => 2024-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18647 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18590217 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/590217
Memory system Feb 27, 2024 Issued
Array ( [id] => 20507151 [patent_doc_number] => 12541427 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-03 [patent_title] => Spatial-temporal memory uncorrectable error prediction system [patent_app_type] => utility [patent_app_number] => 18/585370 [patent_app_country] => US [patent_app_date] => 2024-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4910 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18585370 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/585370
Spatial-temporal memory uncorrectable error prediction system Feb 22, 2024 Issued
Array ( [id] => 20203077 [patent_doc_number] => 12405856 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Memory die fault detection using a calibration pin [patent_app_type] => utility [patent_app_number] => 18/584385 [patent_app_country] => US [patent_app_date] => 2024-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 10350 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18584385 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/584385
Memory die fault detection using a calibration pin Feb 21, 2024 Issued
Array ( [id] => 20403548 [patent_doc_number] => 12493521 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-09 [patent_title] => Generating a protected and balanced codeword [patent_app_type] => utility [patent_app_number] => 18/582214 [patent_app_country] => US [patent_app_date] => 2024-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 25025 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18582214 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/582214
Generating a protected and balanced codeword Feb 19, 2024 Issued
Array ( [id] => 20034995 [patent_doc_number] => 20250173217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => MEMORY INCLUDING ECC ENGINE [patent_app_type] => utility [patent_app_number] => 18/442555 [patent_app_country] => US [patent_app_date] => 2024-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5624 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18442555 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/442555
Memory including error correction code engine Feb 14, 2024 Issued
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