
Andy Ho
Examiner (ID: 5607, Phone: (571)272-3762 , Office: P/2194 )
| Most Active Art Unit | 2194 |
| Art Unit(s) | 2126, 2194, 2151 |
| Total Applications | 1669 |
| Issued Applications | 1447 |
| Pending Applications | 77 |
| Abandoned Applications | 165 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2522499
[patent_doc_number] => 04870345
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-09-26
[patent_title] => 'Semiconductor intergrated circuit device'
[patent_app_type] => 1
[patent_app_number] => 7/081095
[patent_app_country] => US
[patent_app_date] => 1987-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 14
[patent_no_of_words] => 8216
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 217
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/870/04870345.pdf
[firstpage_image] =>[orig_patent_app_number] => 081095
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/081095 | Semiconductor intergrated circuit device | Aug 2, 1987 | Issued |
Array
(
[id] => 2642674
[patent_doc_number] => 04914385
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-04-03
[patent_title] => 'Current detector'
[patent_app_type] => 1
[patent_app_number] => 7/077934
[patent_app_country] => US
[patent_app_date] => 1987-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2377
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 20
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/914/04914385.pdf
[firstpage_image] =>[orig_patent_app_number] => 077934
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/077934 | Current detector | Jul 26, 1987 | Issued |
Array
(
[id] => 2494680
[patent_doc_number] => 04859938
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-08-22
[patent_title] => 'Novel technique to detect oxydonor generation in IC fabrication'
[patent_app_type] => 1
[patent_app_number] => 7/078094
[patent_app_country] => US
[patent_app_date] => 1987-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 15
[patent_no_of_words] => 3956
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/859/04859938.pdf
[firstpage_image] =>[orig_patent_app_number] => 078094
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/078094 | Novel technique to detect oxydonor generation in IC fabrication | Jul 26, 1987 | Issued |
Array
(
[id] => 2567515
[patent_doc_number] => 04835469
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-05-30
[patent_title] => 'Integrated circuit clip for circuit analyzer'
[patent_app_type] => 1
[patent_app_number] => 7/077648
[patent_app_country] => US
[patent_app_date] => 1987-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2662
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 15
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/835/04835469.pdf
[firstpage_image] =>[orig_patent_app_number] => 077648
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/077648 | Integrated circuit clip for circuit analyzer | Jul 23, 1987 | Issued |
Array
(
[id] => 2513037
[patent_doc_number] => 04795974
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-01-03
[patent_title] => 'Digital energy meter'
[patent_app_type] => 1
[patent_app_number] => 7/077579
[patent_app_country] => US
[patent_app_date] => 1987-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 2257
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 304
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/795/04795974.pdf
[firstpage_image] =>[orig_patent_app_number] => 077579
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/077579 | Digital energy meter | Jul 23, 1987 | Issued |
Array
(
[id] => 2393095
[patent_doc_number] => 04764720
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-08-16
[patent_title] => 'Apparatus and method for measuring variable frequency power'
[patent_app_type] => 1
[patent_app_number] => 7/077009
[patent_app_country] => US
[patent_app_date] => 1987-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2746
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 320
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/764/04764720.pdf
[firstpage_image] =>[orig_patent_app_number] => 077009
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/077009 | Apparatus and method for measuring variable frequency power | Jul 21, 1987 | Issued |
Array
(
[id] => 2516642
[patent_doc_number] => 04841241
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-06-20
[patent_title] => 'Testing device for both-sided contacting of component-equipped printed circuit boards'
[patent_app_type] => 1
[patent_app_number] => 7/075994
[patent_app_country] => US
[patent_app_date] => 1987-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2408
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/841/04841241.pdf
[firstpage_image] =>[orig_patent_app_number] => 075994
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/075994 | Testing device for both-sided contacting of component-equipped printed circuit boards | Jul 20, 1987 | Issued |
Array
(
[id] => 2497203
[patent_doc_number] => 04825155
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-04-25
[patent_title] => 'X-band logic test jig'
[patent_app_type] => 1
[patent_app_number] => 7/075714
[patent_app_country] => US
[patent_app_date] => 1987-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 3197
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/825/04825155.pdf
[firstpage_image] =>[orig_patent_app_number] => 075714
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/075714 | X-band logic test jig | Jul 19, 1987 | Issued |
Array
(
[id] => 2507799
[patent_doc_number] => 04799021
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-01-17
[patent_title] => 'Method and apparatus for testing EPROM type semiconductor devices during burn-in'
[patent_app_type] => 1
[patent_app_number] => 7/073654
[patent_app_country] => US
[patent_app_date] => 1987-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 3474
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 396
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/799/04799021.pdf
[firstpage_image] =>[orig_patent_app_number] => 073654
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/073654 | Method and apparatus for testing EPROM type semiconductor devices during burn-in | Jul 14, 1987 | Issued |
| 07/063658 | METHOD AND APPARATUS OF TESTING PRINTED CIRCUIT BOARDS AND ASSEMBLY EMPLOYABLE THEREWITH | Jun 17, 1987 | Abandoned |
Array
(
[id] => 2624988
[patent_doc_number] => 04894610
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-01-16
[patent_title] => 'Current-transformer arrangement for an electrostatic meter'
[patent_app_type] => 1
[patent_app_number] => 7/057918
[patent_app_country] => US
[patent_app_date] => 1987-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 15
[patent_no_of_words] => 3593
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/894/04894610.pdf
[firstpage_image] =>[orig_patent_app_number] => 057918
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/057918 | Current-transformer arrangement for an electrostatic meter | Jun 11, 1987 | Issued |
Array
(
[id] => 2607494
[patent_doc_number] => 04912399
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-03-27
[patent_title] => 'Multiple lead probe for integrated circuits in wafer form'
[patent_app_type] => 1
[patent_app_number] => 7/059903
[patent_app_country] => US
[patent_app_date] => 1987-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 4
[patent_no_of_words] => 3944
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 305
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/912/04912399.pdf
[firstpage_image] =>[orig_patent_app_number] => 059903
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/059903 | Multiple lead probe for integrated circuits in wafer form | Jun 8, 1987 | Issued |
Array
(
[id] => 2591082
[patent_doc_number] => 04908570
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-03-13
[patent_title] => 'Method of measuring FET noise parameters'
[patent_app_type] => 1
[patent_app_number] => 7/056848
[patent_app_country] => US
[patent_app_date] => 1987-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 5249
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/908/04908570.pdf
[firstpage_image] =>[orig_patent_app_number] => 056848
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/056848 | Method of measuring FET noise parameters | May 31, 1987 | Issued |
Array
(
[id] => 2613605
[patent_doc_number] => 04902969
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-02-20
[patent_title] => 'Automated burn-in system'
[patent_app_type] => 1
[patent_app_number] => 7/057255
[patent_app_country] => US
[patent_app_date] => 1987-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 42
[patent_figures_cnt] => 54
[patent_no_of_words] => 16623
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/902/04902969.pdf
[firstpage_image] =>[orig_patent_app_number] => 057255
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/057255 | Automated burn-in system | May 31, 1987 | Issued |
Array
(
[id] => 2558343
[patent_doc_number] => 04803423
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-02-07
[patent_title] => 'Input circuit for a probe of a logic analyser and probe and logic analyser provided with such a circuit'
[patent_app_type] => 1
[patent_app_number] => 7/055659
[patent_app_country] => US
[patent_app_date] => 1987-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 3056
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/803/04803423.pdf
[firstpage_image] =>[orig_patent_app_number] => 055659
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/055659 | Input circuit for a probe of a logic analyser and probe and logic analyser provided with such a circuit | May 27, 1987 | Issued |
Array
(
[id] => 2447798
[patent_doc_number] => 04779041
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-10-18
[patent_title] => 'Integrated circuit transfer test device system'
[patent_app_type] => 1
[patent_app_number] => 7/052528
[patent_app_country] => US
[patent_app_date] => 1987-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2023
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/779/04779041.pdf
[firstpage_image] =>[orig_patent_app_number] => 052528
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/052528 | Integrated circuit transfer test device system | May 19, 1987 | Issued |
Array
(
[id] => 2522993
[patent_doc_number] => 04855672
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-08-08
[patent_title] => 'Method and process for testing the reliability of integrated circuit (IC) chips and novel IC circuitry for accomplishing same'
[patent_app_type] => 1
[patent_app_number] => 7/051888
[patent_app_country] => US
[patent_app_date] => 1987-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 2885
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/855/04855672.pdf
[firstpage_image] =>[orig_patent_app_number] => 051888
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/051888 | Method and process for testing the reliability of integrated circuit (IC) chips and novel IC circuitry for accomplishing same | May 17, 1987 | Issued |
Array
(
[id] => 2418236
[patent_doc_number] => 04786863
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-11-22
[patent_title] => 'Solid state watthour meter with switched-capacitor integration'
[patent_app_type] => 1
[patent_app_number] => 7/050628
[patent_app_country] => US
[patent_app_date] => 1987-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 13
[patent_no_of_words] => 4691
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 250
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/786/04786863.pdf
[firstpage_image] =>[orig_patent_app_number] => 050628
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/050628 | Solid state watthour meter with switched-capacitor integration | May 14, 1987 | Issued |
Array
(
[id] => 2507507
[patent_doc_number] => 04799005
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-01-17
[patent_title] => 'Electrical power line parameter measurement apparatus and systems, including compact, line-mounted modules'
[patent_app_type] => 1
[patent_app_number] => 7/048579
[patent_app_country] => US
[patent_app_date] => 1987-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 22
[patent_no_of_words] => 8586
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/799/04799005.pdf
[firstpage_image] =>[orig_patent_app_number] => 048579
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/048579 | Electrical power line parameter measurement apparatus and systems, including compact, line-mounted modules | May 10, 1987 | Issued |
Array
(
[id] => 2461869
[patent_doc_number] => 04785237
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-11-15
[patent_title] => 'Amplifier with D.C. compensation'
[patent_app_type] => 1
[patent_app_number] => 7/045207
[patent_app_country] => US
[patent_app_date] => 1987-05-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 1829
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/785/04785237.pdf
[firstpage_image] =>[orig_patent_app_number] => 045207
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/045207 | Amplifier with D.C. compensation | May 3, 1987 | Issued |