Search

Andy Huynh

Examiner (ID: 12203, Phone: (571)272-1781 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
1643
Issued Applications
1476
Pending Applications
22
Abandoned Applications
145

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10370594 [patent_doc_number] => 20150255599 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-10 [patent_title] => 'VERTICAL MEMORY DEVICES, MEMORY ARRAYS, AND RELATED METHODS' [patent_app_type] => utility [patent_app_number] => 14/718785 [patent_app_country] => US [patent_app_date] => 2015-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9340 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14718785 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/718785
Vertical memory devices, memory arrays, and memory devices May 20, 2015 Issued
Array ( [id] => 10351163 [patent_doc_number] => 20150236168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-20 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/706282 [patent_app_country] => US [patent_app_date] => 2015-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 24947 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14706282 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/706282
Semiconductor device May 6, 2015 Issued
Array ( [id] => 10638605 [patent_doc_number] => 09356117 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-31 [patent_title] => 'Method for forming avalanche energy handling capable III-nitride transistors' [patent_app_type] => utility [patent_app_number] => 14/688639 [patent_app_country] => US [patent_app_date] => 2015-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 6759 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14688639 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/688639
Method for forming avalanche energy handling capable III-nitride transistors Apr 15, 2015 Issued
Array ( [id] => 11564796 [patent_doc_number] => 09627390 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-18 [patent_title] => 'Semiconductor device having fin-type active patterns and gate nodes' [patent_app_type] => utility [patent_app_number] => 14/683151 [patent_app_country] => US [patent_app_date] => 2015-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 52 [patent_no_of_words] => 28765 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14683151 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/683151
Semiconductor device having fin-type active patterns and gate nodes Apr 9, 2015 Issued
Array ( [id] => 10331026 [patent_doc_number] => 20150216030 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-30 [patent_title] => 'Multi-Dimensional Integrated Circuit Structures and Methods of Forming the Same' [patent_app_type] => utility [patent_app_number] => 14/680822 [patent_app_country] => US [patent_app_date] => 2015-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 8857 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14680822 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/680822
Multi-dimensional integrated circuit structures and methods of forming the same Apr 6, 2015 Issued
Array ( [id] => 10590740 [patent_doc_number] => 09312362 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-12 [patent_title] => 'Manufacture of a variation resistant metal-oxide-semiconductor field effect transistor (MOSFET)' [patent_app_type] => utility [patent_app_number] => 14/664595 [patent_app_country] => US [patent_app_date] => 2015-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 5763 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14664595 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/664595
Manufacture of a variation resistant metal-oxide-semiconductor field effect transistor (MOSFET) Mar 19, 2015 Issued
Array ( [id] => 10309544 [patent_doc_number] => 20150194545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-09 [patent_title] => 'Dendritic Metal Structures, Methods for Making Dendritic Metal Structures, and Devices Including Them' [patent_app_type] => utility [patent_app_number] => 14/661994 [patent_app_country] => US [patent_app_date] => 2015-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6864 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14661994 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/661994
Dendritic Metal Structures, Methods for Making Dendritic Metal Structures, and Devices Including Them Mar 17, 2015 Abandoned
Array ( [id] => 10294529 [patent_doc_number] => 20150179527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING VARYING P-TOP AND N-GRADE REGIONS' [patent_app_type] => utility [patent_app_number] => 14/636931 [patent_app_country] => US [patent_app_date] => 2015-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 11926 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14636931 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/636931
Methods of manufacturing a semiconductor device having varying p-top and n-grade regions Mar 2, 2015 Issued
Array ( [id] => 11432051 [patent_doc_number] => 09570376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-14 [patent_title] => 'Electrical interconnect for an integrated circuit package and method of making same' [patent_app_type] => utility [patent_app_number] => 14/625744 [patent_app_country] => US [patent_app_date] => 2015-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 22 [patent_no_of_words] => 5136 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14625744 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/625744
Electrical interconnect for an integrated circuit package and method of making same Feb 18, 2015 Issued
Array ( [id] => 10112416 [patent_doc_number] => 09147836 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-29 [patent_title] => 'Layouts for resistive RAM cells' [patent_app_type] => utility [patent_app_number] => 14/621139 [patent_app_country] => US [patent_app_date] => 2015-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 30 [patent_no_of_words] => 14803 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14621139 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/621139
Layouts for resistive RAM cells Feb 11, 2015 Issued
Array ( [id] => 10252068 [patent_doc_number] => 20150137065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-21 [patent_title] => 'Memory Cells and Methods of Forming Memory Cells' [patent_app_type] => utility [patent_app_number] => 14/599924 [patent_app_country] => US [patent_app_date] => 2015-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3541 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14599924 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/599924
Memory cells containing metal oxides Jan 18, 2015 Issued
Array ( [id] => 10321745 [patent_doc_number] => 20150206749 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-23 [patent_title] => 'Diamond Semiconductor System and Method' [patent_app_type] => utility [patent_app_number] => 14/595320 [patent_app_country] => US [patent_app_date] => 2015-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7277 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14595320 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/595320
Diamond Semiconductor System and Method Jan 12, 2015
Array ( [id] => 10132150 [patent_doc_number] => 09165991 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-20 [patent_title] => 'Display device' [patent_app_type] => utility [patent_app_number] => 14/588771 [patent_app_country] => US [patent_app_date] => 2015-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 80 [patent_no_of_words] => 14359 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14588771 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/588771
Display device Jan 1, 2015 Issued
Array ( [id] => 10230355 [patent_doc_number] => 20150115349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-30 [patent_title] => 'METHODS OF FABRICATING MEMORY DEVICES HAVING CHARGED SPECIES AND METHODS OF ADJUSTING FLATBAND VOLTAGE IN SUCH MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 14/588659 [patent_app_country] => US [patent_app_date] => 2015-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2986 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14588659 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/588659
Methods of fabricating memory devices having charged species Jan 1, 2015 Issued
Array ( [id] => 10223592 [patent_doc_number] => 20150108585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-23 [patent_title] => 'FULLY SUBSTRATE-ISOLATED FINFET TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 14/587872 [patent_app_country] => US [patent_app_date] => 2014-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7345 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14587872 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/587872
Fully substrate-isolated FinFET transistor Dec 30, 2014 Issued
Array ( [id] => 10223646 [patent_doc_number] => 20150108640 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-23 [patent_title] => 'THIN INTEGRATED CIRCUIT CHIP-ON-BOARD ASSEMBLY AND METHOD OF MAKING' [patent_app_type] => utility [patent_app_number] => 14/586668 [patent_app_country] => US [patent_app_date] => 2014-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10089 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14586668 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/586668
Thin integrated circuit chip-on-board assembly Dec 29, 2014 Issued
Array ( [id] => 11253150 [patent_doc_number] => 09478664 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-25 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/575052 [patent_app_country] => US [patent_app_date] => 2014-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 73 [patent_figures_cnt] => 165 [patent_no_of_words] => 53824 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14575052 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/575052
Semiconductor device Dec 17, 2014 Issued
Array ( [id] => 10638588 [patent_doc_number] => 09356098 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-31 [patent_title] => 'Semiconductor device with oxide semiconductor film' [patent_app_type] => utility [patent_app_number] => 14/574424 [patent_app_country] => US [patent_app_date] => 2014-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 59 [patent_figures_cnt] => 152 [patent_no_of_words] => 56016 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14574424 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/574424
Semiconductor device with oxide semiconductor film Dec 17, 2014 Issued
Array ( [id] => 10576942 [patent_doc_number] => 09299592 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-29 [patent_title] => 'Package structure and packaging method of wafer level chip scale package' [patent_app_type] => utility [patent_app_number] => 14/574405 [patent_app_country] => US [patent_app_date] => 2014-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 3895 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14574405 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/574405
Package structure and packaging method of wafer level chip scale package Dec 17, 2014 Issued
Array ( [id] => 11187612 [patent_doc_number] => 09419023 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-16 [patent_title] => 'Display device' [patent_app_type] => utility [patent_app_number] => 14/574706 [patent_app_country] => US [patent_app_date] => 2014-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4962 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14574706 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/574706
Display device Dec 17, 2014 Issued
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