Search

Andy Huynh

Examiner (ID: 12203, Phone: (571)272-1781 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
1643
Issued Applications
1476
Pending Applications
22
Abandoned Applications
145

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16521829 [patent_doc_number] => 10873055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-22 [patent_title] => Display panel having light guiding medium structure and display device [patent_app_type] => utility [patent_app_number] => 16/513332 [patent_app_country] => US [patent_app_date] => 2019-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 6143 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16513332 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/513332
Display panel having light guiding medium structure and display device Jul 15, 2019 Issued
Array ( [id] => 15046251 [patent_doc_number] => 20190334130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/510375 [patent_app_country] => US [patent_app_date] => 2019-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9468 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16510375 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/510375
Display device including polarization film Jul 11, 2019 Issued
Array ( [id] => 16668544 [patent_doc_number] => 10937802 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-02 [patent_title] => Void formation for charge trap structures [patent_app_type] => utility [patent_app_number] => 16/452292 [patent_app_country] => US [patent_app_date] => 2019-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 21 [patent_no_of_words] => 12312 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16452292 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/452292
Void formation for charge trap structures Jun 24, 2019 Issued
Array ( [id] => 15922185 [patent_doc_number] => 10658341 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Semiconductor package [patent_app_type] => utility [patent_app_number] => 16/448703 [patent_app_country] => US [patent_app_date] => 2019-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 15294 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16448703 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/448703
Semiconductor package Jun 20, 2019 Issued
Array ( [id] => 16553225 [patent_doc_number] => 10886394 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-01-05 [patent_title] => Semiconductor structure [patent_app_type] => utility [patent_app_number] => 16/446198 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5521 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16446198 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/446198
Semiconductor structure Jun 18, 2019 Issued
Array ( [id] => 16410061 [patent_doc_number] => 10818625 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-27 [patent_title] => Electronic device [patent_app_type] => utility [patent_app_number] => 16/446087 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2588 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16446087 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/446087
Electronic device Jun 18, 2019 Issued
Array ( [id] => 15370069 [patent_doc_number] => 20200020799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/446044 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7480 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16446044 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/446044
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Jun 18, 2019 Abandoned
Array ( [id] => 16495736 [patent_doc_number] => 10861786 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-08 [patent_title] => Semiconductor device having a multilayer structure [patent_app_type] => utility [patent_app_number] => 16/446078 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 26 [patent_no_of_words] => 10362 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16446078 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/446078
Semiconductor device having a multilayer structure Jun 18, 2019 Issued
Array ( [id] => 16609332 [patent_doc_number] => 10910346 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-02 [patent_title] => Semiconductor package [patent_app_type] => utility [patent_app_number] => 16/445861 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 51 [patent_no_of_words] => 13263 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16445861 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/445861
Semiconductor package Jun 18, 2019 Issued
Array ( [id] => 16487986 [patent_doc_number] => 20200381595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => White Light Emitting Device Comprising Multiple Photoluminescence Materials [patent_app_type] => utility [patent_app_number] => 16/429303 [patent_app_country] => US [patent_app_date] => 2019-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8068 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16429303 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/429303
White light emitting device comprising multiple photoluminescence materials Jun 2, 2019 Issued
Array ( [id] => 14843189 [patent_doc_number] => 20190279995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-12 [patent_title] => Flash Memory Structure with Reduced Dimension of Gate Structure and Methods of Forming Thereof [patent_app_type] => utility [patent_app_number] => 16/422634 [patent_app_country] => US [patent_app_date] => 2019-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6956 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16422634 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/422634
Flash memory structure with reduced dimension of gate structure and methods of forming thereof May 23, 2019 Issued
Array ( [id] => 14812941 [patent_doc_number] => 20190273080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-05 [patent_title] => APPARATUSES INCLUDING BURIED DIGIT LINES [patent_app_type] => utility [patent_app_number] => 16/414417 [patent_app_country] => US [patent_app_date] => 2019-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7480 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16414417 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/414417
Apparatuses including buried digit lines May 15, 2019 Issued
Array ( [id] => 14784939 [patent_doc_number] => 20190267367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => COMPACT PROTECTION DEVICE FOR PROTECTING AN INTEGRATED CIRCUIT AGAINST ELECTROSTATIC DISCHARGE [patent_app_type] => utility [patent_app_number] => 16/406534 [patent_app_country] => US [patent_app_date] => 2019-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4885 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16406534 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/406534
Compact protection device for protecting an integrated circuit against electrostatic discharge May 7, 2019 Issued
Array ( [id] => 15315655 [patent_doc_number] => 10522544 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-31 [patent_title] => Techniques providing metal gate devices with multiple barrier layers [patent_app_type] => utility [patent_app_number] => 16/400677 [patent_app_country] => US [patent_app_date] => 2019-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4171 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16400677 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/400677
Techniques providing metal gate devices with multiple barrier layers Apr 30, 2019 Issued
Array ( [id] => 15315825 [patent_doc_number] => 10522630 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-31 [patent_title] => High electron mobility transistor structure and method of making the same [patent_app_type] => utility [patent_app_number] => 16/386583 [patent_app_country] => US [patent_app_date] => 2019-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 5627 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16386583 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/386583
High electron mobility transistor structure and method of making the same Apr 16, 2019 Issued
Array ( [id] => 14722239 [patent_doc_number] => 20190252183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => COMPOUND SEMICONDUCTOR DEVICE STRUCTURES COMPRISING POLYCRYSTALLINE CVD DIAMOND [patent_app_type] => utility [patent_app_number] => 16/383609 [patent_app_country] => US [patent_app_date] => 2019-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4829 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16383609 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/383609
Methods for fabricating semiconductor devices that have polycrystalline CVD diamond Apr 13, 2019 Issued
Array ( [id] => 16684384 [patent_doc_number] => 10943875 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-09 [patent_title] => Fragmenting computer chips [patent_app_type] => utility [patent_app_number] => 16/354286 [patent_app_country] => US [patent_app_date] => 2019-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 26 [patent_no_of_words] => 8990 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16354286 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/354286
Fragmenting computer chips Mar 14, 2019 Issued
Array ( [id] => 16700124 [patent_doc_number] => 10950735 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-16 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/351245 [patent_app_country] => US [patent_app_date] => 2019-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 8373 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16351245 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/351245
Semiconductor device Mar 11, 2019 Issued
Array ( [id] => 16593802 [patent_doc_number] => 10903079 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-26 [patent_title] => Method for forming complementary doped semiconductor regions in a semiconductor body [patent_app_type] => utility [patent_app_number] => 16/351256 [patent_app_country] => US [patent_app_date] => 2019-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 36 [patent_no_of_words] => 7967 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16351256 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/351256
Method for forming complementary doped semiconductor regions in a semiconductor body Mar 11, 2019 Issued
Array ( [id] => 16312800 [patent_doc_number] => 20200291538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => Porous Cu on Cu Surface for Semiconductor Packages [patent_app_type] => utility [patent_app_number] => 16/351116 [patent_app_country] => US [patent_app_date] => 2019-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5843 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -29 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16351116 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/351116
Porous Cu on Cu surface for semiconductor packages Mar 11, 2019 Issued
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