Angel Roman

Array ( [id] => 20013088 [patent_doc_number] => 20250151310 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 19/012337 [patent_app_country] => US [patent_app_date] => 2025-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7871 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19012337 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19436216 [patent_doc_number] => 20240304714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => SEMICONDUCTOR POWER DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/656631 [patent_app_country] => US [patent_app_date] => 2024-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6508 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 375 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18656631 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19349414 [patent_doc_number] => 20240258378 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => Fabricating Method of Semiconductor Device [patent_app_type] => utility [patent_app_number] => 18/632253 [patent_app_country] => US [patent_app_date] => 2024-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6053 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18632253 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19349415 [patent_doc_number] => 20240258379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/632275 [patent_app_country] => US [patent_app_date] => 2024-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6037 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18632275 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19384565 [patent_doc_number] => 20240274435 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => METHOD AND APPARATUS FOR MANUFACTURING A SEMICONDUCTOR LAYER AND SUBSTRATE PROVIDED THEREWITH [patent_app_type] => utility [patent_app_number] => 18/626472 [patent_app_country] => US [patent_app_date] => 2024-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13904 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18626472 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19454908 [patent_doc_number] => 20240315038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/613222 [patent_app_country] => US [patent_app_date] => 2024-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14184 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18613222 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19285987 [patent_doc_number] => 20240222464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/604713 [patent_app_country] => US [patent_app_date] => 2024-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 46415 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18604713 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19252789 [patent_doc_number] => 20240203786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => SELF-FORMING, SELF-ALIGNED BARRIERS FOR BACK-END INTERCONNECTS AND METHODS OF MAKING SAME [patent_app_type] => utility [patent_app_number] => 18/589026 [patent_app_country] => US [patent_app_date] => 2024-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7596 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18589026 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19269572 [patent_doc_number] => 20240213276 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/581606 [patent_app_country] => US [patent_app_date] => 2024-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28936 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18581606 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19409250 [patent_doc_number] => 20240292761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => SEMICONDUCTOR-SUPERCONDUCTOR HYBRID DEVICE, ITS MANUFACTURE AND USES [patent_app_type] => utility [patent_app_number] => 18/421830 [patent_app_country] => US [patent_app_date] => 2024-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7703 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18421830 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19751845 [patent_doc_number] => 20250040410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-30 [patent_title] => DISPLAY DEVICE AND MANUFACTURING METHOD OF DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/406229 [patent_app_country] => US [patent_app_date] => 2024-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13793 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18406229 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19071317 [patent_doc_number] => 20240105743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => IMAGING DEVICE, MANUFACTURING METHOD THEREOF, AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 18/529624 [patent_app_country] => US [patent_app_date] => 2023-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23190 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18529624 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19206402 [patent_doc_number] => 20240178301 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => HEMT TRANSISTOR OF THE NORMALLY OFF TYPE INCLUDING A TRENCH CONTAINING A GATE REGION AND FORMING AT LEAST ONE STEP, AND CORRESPONDING MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 18/530050 [patent_app_country] => US [patent_app_date] => 2023-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5737 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18530050 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19038470 [patent_doc_number] => 20240088285 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => ROUGH BUFFER LAYER FOR GROUP III-V DEVICES ON SILICON [patent_app_type] => utility [patent_app_number] => 18/513942 [patent_app_country] => US [patent_app_date] => 2023-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11971 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18513942 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18975441 [patent_doc_number] => 20240055533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-15 [patent_title] => TRANSISTOR AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/383526 [patent_app_country] => US [patent_app_date] => 2023-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29929 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18383526 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19007685 [patent_doc_number] => 20240071756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => METHOD FOR MANUFACTURING GROUP III NITRIDE SEMICONDUCTOR SUBSTRATE [patent_app_type] => utility [patent_app_number] => 18/494122 [patent_app_country] => US [patent_app_date] => 2023-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15120 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18494122 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18943760 [patent_doc_number] => 20240038899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/376994 [patent_app_country] => US [patent_app_date] => 2023-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 31893 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18376994 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18927349 [patent_doc_number] => 20240030353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/376024 [patent_app_country] => US [patent_app_date] => 2023-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 34872 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18376024 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18906119 [patent_doc_number] => 20240021604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => MONOLITHIC COMPONENT COMPRISING A GALLIUM NITRIDE POWER TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/478465 [patent_app_country] => US [patent_app_date] => 2023-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5476 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18478465 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18898827 [patent_doc_number] => 20240014312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => INTEGRATED DESIGN FOR III-NITRIDE DEVICES [patent_app_type] => utility [patent_app_number] => 18/471263 [patent_app_country] => US [patent_app_date] => 2023-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10351 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18471263 [rel_patent_id] =>[rel_patent_doc_number] =>)