Search

Angela J Lee

Examiner (ID: 10714, Phone: (571)272-4453 , Office: P/2911 )

Most Active Art Unit
2911
Art Unit(s)
2911
Total Applications
4543
Issued Applications
4500
Pending Applications
13
Abandoned Applications
25

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16819678 [patent_doc_number] => 11004515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Semiconductor memory device, controller and memory system having the same [patent_app_type] => utility [patent_app_number] => 16/503851 [patent_app_country] => US [patent_app_date] => 2019-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 13343 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16503851 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/503851
Semiconductor memory device, controller and memory system having the same Jul 4, 2019 Issued
Array ( [id] => 16172010 [patent_doc_number] => 10713584 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-14 [patent_title] => Constructing and programming quantum hardware for robust quantum annealing processes [patent_app_type] => utility [patent_app_number] => 16/453477 [patent_app_country] => US [patent_app_date] => 2019-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6491 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16453477 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/453477
Constructing and programming quantum hardware for robust quantum annealing processes Jun 25, 2019 Issued
Array ( [id] => 14968549 [patent_doc_number] => 20190311753 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-10 [patent_title] => APPARATUSES AND METHODS FOR DETERMINING A PHASE RELATIONSHIP BETWEEN AN INPUT CLOCK SIGNAL AND A MULTIPHASE CLOCK SIGNAL [patent_app_type] => utility [patent_app_number] => 16/452436 [patent_app_country] => US [patent_app_date] => 2019-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8856 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16452436 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/452436
Apparatuses and methods for determining a phase relationship between an input clock signal and a multiphase clock signal Jun 24, 2019 Issued
Array ( [id] => 14967611 [patent_doc_number] => 20190311284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-10 [patent_title] => CONSTRUCTING AND PROGRAMMING QUANTUM HARDWARE FOR ROBUST QUANTUM ANNEALING PROCESSES [patent_app_type] => utility [patent_app_number] => 16/450461 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6484 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16450461 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/450461
Constructing and programming quantum hardware for robust quantum annealing processes Jun 23, 2019 Issued
Array ( [id] => 16463876 [patent_doc_number] => 10847233 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-24 [patent_title] => Memory devices and apparatus configured to apply positive voltage levels to data lines for memory cells selected for and inhibited from programming [patent_app_type] => utility [patent_app_number] => 16/435996 [patent_app_country] => US [patent_app_date] => 2019-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7086 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16435996 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/435996
Memory devices and apparatus configured to apply positive voltage levels to data lines for memory cells selected for and inhibited from programming Jun 9, 2019 Issued
Array ( [id] => 16455788 [patent_doc_number] => 20200365214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-19 [patent_title] => APPARATUS AND METHODS FOR CALIBRATING SENSING OF MEMORY CELL DATA STATES [patent_app_type] => utility [patent_app_number] => 16/414897 [patent_app_country] => US [patent_app_date] => 2019-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15219 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16414897 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/414897
Apparatus and methods for calibrating sensing of memory cell data states May 16, 2019 Issued
Array ( [id] => 14784383 [patent_doc_number] => 20190267089 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => Semiconductor Memory Having Both Volatile and Non-Volatile Functionality Including Resistance Change Material and Method of Operating [patent_app_type] => utility [patent_app_number] => 16/407614 [patent_app_country] => US [patent_app_date] => 2019-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15586 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16407614 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/407614
Semiconductor memory having both volatile and non-volatile functionality including resistance change material and method of operating May 8, 2019 Issued
Array ( [id] => 16218230 [patent_doc_number] => 10734050 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-04 [patent_title] => Apparatuses and methods for providing word line voltages [patent_app_type] => utility [patent_app_number] => 16/405075 [patent_app_country] => US [patent_app_date] => 2019-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3745 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16405075 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/405075
Apparatuses and methods for providing word line voltages May 6, 2019 Issued
Array ( [id] => 14750485 [patent_doc_number] => 20190258416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => Embedded Memory Subsystems For A CNN Based Processing Unit And Methods of Making [patent_app_type] => utility [patent_app_number] => 16/403676 [patent_app_country] => US [patent_app_date] => 2019-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3648 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16403676 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/403676
Embedded memory subsystems for a CNN based processing unit and methods of making May 5, 2019 Issued
Array ( [id] => 14750487 [patent_doc_number] => 20190258417 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => MLC BASED MAGNETIC RANDOM ACCESS MEMORY USED IN CNN BASED DIGITAL IC FOR AI [patent_app_type] => utility [patent_app_number] => 16/403678 [patent_app_country] => US [patent_app_date] => 2019-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7550 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16403678 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/403678
MLC based magnetic random access memory used in CNN based digital IC for AI May 5, 2019 Issued
Array ( [id] => 15639615 [patent_doc_number] => 10592804 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-17 [patent_title] => Memory subsystem in CNN based digital IC for artificial intelligence [patent_app_type] => utility [patent_app_number] => 16/403679 [patent_app_country] => US [patent_app_date] => 2019-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 28 [patent_no_of_words] => 4528 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16403679 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/403679
Memory subsystem in CNN based digital IC for artificial intelligence May 5, 2019 Issued
Array ( [id] => 15656387 [patent_doc_number] => 20200090724 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => MEMORY DEVICE FOR REDUCING LEAKAGE CURRENT [patent_app_type] => utility [patent_app_number] => 16/390170 [patent_app_country] => US [patent_app_date] => 2019-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11462 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16390170 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/390170
Memory device for reducing leakage current Apr 21, 2019 Issued
Array ( [id] => 17018176 [patent_doc_number] => 11087821 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-10 [patent_title] => Memory module including register clock driver detecting address frequently accessed [patent_app_type] => utility [patent_app_number] => 16/367385 [patent_app_country] => US [patent_app_date] => 2019-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9684 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16367385 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/367385
Memory module including register clock driver detecting address frequently accessed Mar 27, 2019 Issued
Array ( [id] => 16068803 [patent_doc_number] => 10693369 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-23 [patent_title] => Voltage control device applied in a memory system [patent_app_type] => utility [patent_app_number] => 16/365661 [patent_app_country] => US [patent_app_date] => 2019-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3735 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16365661 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/365661
Voltage control device applied in a memory system Mar 25, 2019 Issued
Array ( [id] => 15717171 [patent_doc_number] => 20200105353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => SINGLE PAGE READ LEVEL TRACKING BY BIT ERROR RATE ANALYSIS [patent_app_type] => utility [patent_app_number] => 16/364347 [patent_app_country] => US [patent_app_date] => 2019-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22341 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16364347 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/364347
Single page read level tracking by bit error rate analysis Mar 25, 2019 Issued
Array ( [id] => 16233689 [patent_doc_number] => 10741249 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-08-11 [patent_title] => Word all zero memory [patent_app_type] => utility [patent_app_number] => 16/365542 [patent_app_country] => US [patent_app_date] => 2019-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 4834 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16365542 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/365542
Word all zero memory Mar 25, 2019 Issued
Array ( [id] => 14903833 [patent_doc_number] => 20190295682 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 16/364685 [patent_app_country] => US [patent_app_date] => 2019-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4467 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16364685 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/364685
Semiconductor device and electronic device Mar 25, 2019 Issued
Array ( [id] => 15857529 [patent_doc_number] => 10644065 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Nonvolatile memory device [patent_app_type] => utility [patent_app_number] => 16/353226 [patent_app_country] => US [patent_app_date] => 2019-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 28 [patent_no_of_words] => 6993 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16353226 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/353226
Nonvolatile memory device Mar 13, 2019 Issued
Array ( [id] => 16637767 [patent_doc_number] => 10916281 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Magnetic memory apparatus [patent_app_type] => utility [patent_app_number] => 16/299861 [patent_app_country] => US [patent_app_date] => 2019-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 9241 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16299861 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/299861
Magnetic memory apparatus Mar 11, 2019 Issued
Array ( [id] => 15624921 [patent_doc_number] => 20200082865 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => MAGNETIC STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 16/297819 [patent_app_country] => US [patent_app_date] => 2019-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8631 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16297819 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/297819
Magnetic storage device Mar 10, 2019 Issued
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