Search

Angela J Lee

Examiner (ID: 10714, Phone: (571)272-4453 , Office: P/2911 )

Most Active Art Unit
2911
Art Unit(s)
2911
Total Applications
4543
Issued Applications
4500
Pending Applications
13
Abandoned Applications
25

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17847706 [patent_doc_number] => 11437090 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-06 [patent_title] => Negative differential resistance circuits [patent_app_type] => utility [patent_app_number] => 16/036751 [patent_app_country] => US [patent_app_date] => 2018-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5007 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16036751 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/036751
Negative differential resistance circuits Jul 15, 2018 Issued
Array ( [id] => 15611043 [patent_doc_number] => 10586588 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-03-10 [patent_title] => Reversing the effects of hot carrier injection and bias threshold instability in SRAMs [patent_app_type] => utility [patent_app_number] => 16/030737 [patent_app_country] => US [patent_app_date] => 2018-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 12736 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16030737 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/030737
Reversing the effects of hot carrier injection and bias threshold instability in SRAMs Jul 8, 2018 Issued
Array ( [id] => 16067219 [patent_doc_number] => 10692569 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-23 [patent_title] => Read-out techniques for multi-bit cells [patent_app_type] => utility [patent_app_number] => 16/028415 [patent_app_country] => US [patent_app_date] => 2018-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 9720 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16028415 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/028415
Read-out techniques for multi-bit cells Jul 5, 2018 Issued
Array ( [id] => 14985265 [patent_doc_number] => 10446554 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-15 [patent_title] => Semiconductor memory device and method of forming the same [patent_app_type] => utility [patent_app_number] => 16/027267 [patent_app_country] => US [patent_app_date] => 2018-07-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6367 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16027267 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/027267
Semiconductor memory device and method of forming the same Jul 3, 2018 Issued
Array ( [id] => 14707577 [patent_doc_number] => 10381551 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-08-13 [patent_title] => Spin orbit torque magnetoresistive random access memory containing shielding element and method of making thereof [patent_app_type] => utility [patent_app_number] => 16/024521 [patent_app_country] => US [patent_app_date] => 2018-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5570 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16024521 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/024521
Spin orbit torque magnetoresistive random access memory containing shielding element and method of making thereof Jun 28, 2018 Issued
Array ( [id] => 13558485 [patent_doc_number] => 20180330790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-15 [patent_title] => Semiconductor Memory Having Both Volatile and Non-Volatile Functionality Including Resistance Change Material and Method of Operating [patent_app_type] => utility [patent_app_number] => 16/017249 [patent_app_country] => US [patent_app_date] => 2018-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15586 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16017249 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/017249
Semiconductor memory having both volatile and non-volatile functionality including resistance change material and method of operating Jun 24, 2018 Issued
Array ( [id] => 14917563 [patent_doc_number] => 10430101 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-01 [patent_title] => Semiconductor memory device that randomizes data and randomizer thereof [patent_app_type] => utility [patent_app_number] => 15/925617 [patent_app_country] => US [patent_app_date] => 2018-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 7278 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15925617 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/925617
Semiconductor memory device that randomizes data and randomizer thereof Mar 18, 2018 Issued
Array ( [id] => 15984237 [patent_doc_number] => 10672453 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Voltage system providing pump voltage for memory device and method for operating the same [patent_app_type] => utility [patent_app_number] => 15/911586 [patent_app_country] => US [patent_app_date] => 2018-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4985 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15911586 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/911586
Voltage system providing pump voltage for memory device and method for operating the same Mar 4, 2018 Issued
Array ( [id] => 16698522 [patent_doc_number] => 10949119 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-16 [patent_title] => Data shaping to reduce error rates in solid state memory devices [patent_app_type] => utility [patent_app_number] => 15/900531 [patent_app_country] => US [patent_app_date] => 2018-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7789 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15900531 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/900531
Data shaping to reduce error rates in solid state memory devices Feb 19, 2018 Issued
Array ( [id] => 14719575 [patent_doc_number] => 20190250851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => METHOD AND APPARATUS FOR PROGRAMMING FLASH BASED STORAGE USING SEGMENTED WRITES [patent_app_type] => utility [patent_app_number] => 15/897923 [patent_app_country] => US [patent_app_date] => 2018-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6394 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15897923 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/897923
Method and apparatus for programming flash based storage using segmented writes Feb 14, 2018 Issued
Array ( [id] => 15984325 [patent_doc_number] => 10672498 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Repair device and semiconductor device including the same [patent_app_type] => utility [patent_app_number] => 15/887552 [patent_app_country] => US [patent_app_date] => 2018-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6862 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15887552 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/887552
Repair device and semiconductor device including the same Feb 1, 2018 Issued
Array ( [id] => 14676041 [patent_doc_number] => 20190237135 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-01 [patent_title] => Write Assist Circuitry [patent_app_type] => utility [patent_app_number] => 15/886630 [patent_app_country] => US [patent_app_date] => 2018-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7202 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15886630 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/886630
Write assist circuitry Jan 31, 2018 Issued
Array ( [id] => 14675993 [patent_doc_number] => 20190237111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-01 [patent_title] => Routing Structures for Memory Applications [patent_app_type] => utility [patent_app_number] => 15/881704 [patent_app_country] => US [patent_app_date] => 2018-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8320 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15881704 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/881704
Routing structures for memory applications Jan 25, 2018 Issued
Array ( [id] => 14459851 [patent_doc_number] => 10325899 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-18 [patent_title] => Semiconductor device including transistors formed in regions of semiconductor substrate and operation method of the same [patent_app_type] => utility [patent_app_number] => 15/880212 [patent_app_country] => US [patent_app_date] => 2018-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 18018 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15880212 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/880212
Semiconductor device including transistors formed in regions of semiconductor substrate and operation method of the same Jan 24, 2018 Issued
Array ( [id] => 14628747 [patent_doc_number] => 20190227741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-25 [patent_title] => Register Access in a Distributed Memory Buffer System [patent_app_type] => utility [patent_app_number] => 15/877661 [patent_app_country] => US [patent_app_date] => 2018-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15825 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15877661 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/877661
Register access in a distributed memory buffer system Jan 22, 2018 Issued
Array ( [id] => 14204631 [patent_doc_number] => 10269435 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-04-23 [patent_title] => Reducing program disturb by modifying word line voltages at interface in two-tier stack after program-verify [patent_app_type] => utility [patent_app_number] => 15/814769 [patent_app_country] => US [patent_app_date] => 2017-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 34 [patent_no_of_words] => 18763 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15814769 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/814769
Reducing program disturb by modifying word line voltages at interface in two-tier stack after program-verify Nov 15, 2017 Issued
Array ( [id] => 15249715 [patent_doc_number] => 10510384 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-17 [patent_title] => Intracycle bitline restore in high performance memory [patent_app_type] => utility [patent_app_number] => 15/814969 [patent_app_country] => US [patent_app_date] => 2017-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5578 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15814969 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/814969
Intracycle bitline restore in high performance memory Nov 15, 2017 Issued
Array ( [id] => 14642223 [patent_doc_number] => 10365855 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-30 [patent_title] => Controller reading data stored in a memory device using buffers, operating method thereof and memory system including controller [patent_app_type] => utility [patent_app_number] => 15/813543 [patent_app_country] => US [patent_app_date] => 2017-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 9806 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15813543 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/813543
Controller reading data stored in a memory device using buffers, operating method thereof and memory system including controller Nov 14, 2017 Issued
Array ( [id] => 14644043 [patent_doc_number] => 10366769 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-30 [patent_title] => Nonvolatile memory device and programming method for fast and slow cells thereof [patent_app_type] => utility [patent_app_number] => 15/810741 [patent_app_country] => US [patent_app_date] => 2017-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 9759 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15810741 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/810741
Nonvolatile memory device and programming method for fast and slow cells thereof Nov 12, 2017 Issued
Array ( [id] => 14558601 [patent_doc_number] => 10347773 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-09 [patent_title] => Split gate non-volatile memory (NVM) with improved programming efficiency [patent_app_type] => utility [patent_app_number] => 15/807539 [patent_app_country] => US [patent_app_date] => 2017-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7384 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15807539 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/807539
Split gate non-volatile memory (NVM) with improved programming efficiency Nov 7, 2017 Issued
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