Search

Angela J Lee

Examiner (ID: 10714, Phone: (571)272-4453 , Office: P/2911 )

Most Active Art Unit
2911
Art Unit(s)
2911
Total Applications
4543
Issued Applications
4500
Pending Applications
13
Abandoned Applications
25

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11897941 [patent_doc_number] => 09767880 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-09-19 [patent_title] => 'Ferroelectric memory cell apparatuses and methods of operating ferroelectric memory cells' [patent_app_type] => utility [patent_app_number] => 15/071991 [patent_app_country] => US [patent_app_date] => 2016-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 16528 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15071991 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/071991
Ferroelectric memory cell apparatuses and methods of operating ferroelectric memory cells Mar 15, 2016 Issued
Array ( [id] => 11958944 [patent_doc_number] => 20170263095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-14 [patent_title] => 'Appliances Built-in Safety Features' [patent_app_type] => utility [patent_app_number] => 15/067452 [patent_app_country] => US [patent_app_date] => 2016-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1821 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15067452 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/067452
Appliances Built-in Safety Features Mar 10, 2016 Abandoned
Array ( [id] => 11951039 [patent_doc_number] => 20170255190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-07 [patent_title] => 'Apparatus and Method for Simulating a Failure Response in an Electromechanical Actuator' [patent_app_type] => utility [patent_app_number] => 15/061225 [patent_app_country] => US [patent_app_date] => 2016-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5082 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15061225 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/061225
Apparatus and method for simulating a failure response in an electromechanical actuator Mar 3, 2016 Issued
Array ( [id] => 11475280 [patent_doc_number] => 20170062063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-02 [patent_title] => 'MEMORY DEVICE THAT PERFORMS AN ADVANCE READING OPERATION' [patent_app_type] => utility [patent_app_number] => 15/062021 [patent_app_country] => US [patent_app_date] => 2016-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 9024 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15062021 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/062021
Memory device that performs an advance reading operation Mar 3, 2016 Issued
Array ( [id] => 10992821 [patent_doc_number] => 20160189767 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-30 [patent_title] => 'SEMICONDUCTOR DEVICES AND INTEGRATED CIRCUITS INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/060984 [patent_app_country] => US [patent_app_date] => 2016-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7398 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15060984 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/060984
Semiconductor devices and integrated circuits including the same Mar 3, 2016 Issued
Array ( [id] => 11725016 [patent_doc_number] => 09697876 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-07-04 [patent_title] => 'Vertical bit vector shift in memory' [patent_app_type] => utility [patent_app_number] => 15/057736 [patent_app_country] => US [patent_app_date] => 2016-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 25111 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15057736 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/057736
Vertical bit vector shift in memory Feb 29, 2016 Issued
Array ( [id] => 10825854 [patent_doc_number] => 20160172022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-16 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/050074 [patent_app_country] => US [patent_app_date] => 2016-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 31682 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15050074 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/050074
Semiconductor integrated circuit device and system Feb 21, 2016 Issued
Array ( [id] => 12969760 [patent_doc_number] => 09876162 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-23 [patent_title] => Electronic device including a semiconductor memory having variable resistance structure with magnetic correction layer [patent_app_type] => utility [patent_app_number] => 15/048035 [patent_app_country] => US [patent_app_date] => 2016-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 11526 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15048035 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/048035
Electronic device including a semiconductor memory having variable resistance structure with magnetic correction layer Feb 18, 2016 Issued
Array ( [id] => 11036874 [patent_doc_number] => 20160233830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-11 [patent_title] => 'Solar Power Generation System and Failure Diagnosis Method Therefor' [patent_app_type] => utility [patent_app_number] => 15/018244 [patent_app_country] => US [patent_app_date] => 2016-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10192 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15018244 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/018244
Solar power generation system and failure diagnosis method therefor Feb 7, 2016 Issued
Array ( [id] => 11910058 [patent_doc_number] => 09778867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-03 [patent_title] => 'Data maintenance method for error correction and data storage device using the same' [patent_app_type] => utility [patent_app_number] => 15/009503 [patent_app_country] => US [patent_app_date] => 2016-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3281 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15009503 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/009503
Data maintenance method for error correction and data storage device using the same Jan 27, 2016 Issued
Array ( [id] => 11473687 [patent_doc_number] => 20170060470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-02 [patent_title] => 'MEMORY SYSTEM AND OPERATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/009384 [patent_app_country] => US [patent_app_date] => 2016-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 13591 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15009384 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/009384
MEMORY SYSTEM AND OPERATING METHOD THEREOF Jan 27, 2016 Abandoned
Array ( [id] => 14329923 [patent_doc_number] => 10295977 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-21 [patent_title] => Smart auto reset for digital positioners connected to a local control panel or push button [patent_app_type] => utility [patent_app_number] => 15/005087 [patent_app_country] => US [patent_app_date] => 2016-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5136 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15005087 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/005087
Smart auto reset for digital positioners connected to a local control panel or push button Jan 24, 2016 Issued
Array ( [id] => 10787171 [patent_doc_number] => 20160133327 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'MEMORY DEVICES AND BIASING METHODS FOR MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 14/995302 [patent_app_country] => US [patent_app_date] => 2016-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7282 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14995302 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/995302
Operating memory devices to apply a programming potential to a memory cell in a string coupled to a source and data line concurrently with biasing the data line to a greater potential than the source Jan 13, 2016 Issued
Array ( [id] => 10787160 [patent_doc_number] => 20160133316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'TRACKING CELL AND METHOD' [patent_app_type] => utility [patent_app_number] => 14/995387 [patent_app_country] => US [patent_app_date] => 2016-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7551 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14995387 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/995387
Tracking cell and method Jan 13, 2016 Issued
Array ( [id] => 11453003 [patent_doc_number] => 09576652 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-21 [patent_title] => 'Resistive random access memory apparatus with forward and reverse reading modes' [patent_app_type] => utility [patent_app_number] => 14/992025 [patent_app_country] => US [patent_app_date] => 2016-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3228 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 316 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14992025 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/992025
Resistive random access memory apparatus with forward and reverse reading modes Jan 10, 2016 Issued
Array ( [id] => 11466524 [patent_doc_number] => 09583164 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-28 [patent_title] => 'Bipolar logic gates on MOS-based memory chips' [patent_app_type] => utility [patent_app_number] => 14/990474 [patent_app_country] => US [patent_app_date] => 2016-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 8893 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14990474 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/990474
Bipolar logic gates on MOS-based memory chips Jan 6, 2016 Issued
Array ( [id] => 11439021 [patent_doc_number] => 20170040042 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-09 [patent_title] => 'Power Management Circuit for an Electronic Device' [patent_app_type] => utility [patent_app_number] => 14/980287 [patent_app_country] => US [patent_app_date] => 2015-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5797 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14980287 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/980287
Power management circuit for an electronic device Dec 27, 2015 Issued
Array ( [id] => 15057471 [patent_doc_number] => 10459034 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-29 [patent_title] => Method and apparatus for estimating state of health (SOH) of battery [patent_app_type] => utility [patent_app_number] => 14/757540 [patent_app_country] => US [patent_app_date] => 2015-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6807 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14757540 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/757540
Method and apparatus for estimating state of health (SOH) of battery Dec 22, 2015 Issued
Array ( [id] => 11725038 [patent_doc_number] => 09697899 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-07-04 [patent_title] => 'Parallel deflate decoding method and apparatus' [patent_app_type] => utility [patent_app_number] => 14/977377 [patent_app_country] => US [patent_app_date] => 2015-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7105 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14977377 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/977377
Parallel deflate decoding method and apparatus Dec 20, 2015 Issued
Array ( [id] => 11622896 [patent_doc_number] => 20170133083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-11 [patent_title] => 'MEMORY DEVICES AND SYSTEMS INCORPORATION BETWEEN-DIMM BUFFERING TO INCREASE CAPACITY AND BANDWIDTH' [patent_app_type] => utility [patent_app_number] => 14/935291 [patent_app_country] => US [patent_app_date] => 2015-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7778 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14935291 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/935291
MEMORY DEVICES AND SYSTEMS INCORPORATION BETWEEN-DIMM BUFFERING TO INCREASE CAPACITY AND BANDWIDTH Nov 5, 2015 Abandoned
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