Search

Angela J Lee

Examiner (ID: 10714, Phone: (571)272-4453 , Office: P/2911 )

Most Active Art Unit
2911
Art Unit(s)
2911
Total Applications
4543
Issued Applications
4500
Pending Applications
13
Abandoned Applications
25

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11430793 [patent_doc_number] => 09569109 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-14 [patent_title] => 'Nonvolatile memory interface for metadata shadowing' [patent_app_type] => utility [patent_app_number] => 14/747976 [patent_app_country] => US [patent_app_date] => 2015-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 5083 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14747976 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/747976
Nonvolatile memory interface for metadata shadowing Jun 22, 2015 Issued
Array ( [id] => 11599512 [patent_doc_number] => 09646688 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-09 [patent_title] => 'Three dimensional non-volatile storage with connected word lines' [patent_app_type] => utility [patent_app_number] => 14/746003 [patent_app_country] => US [patent_app_date] => 2015-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 56 [patent_figures_cnt] => 64 [patent_no_of_words] => 32154 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 349 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14746003 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/746003
Three dimensional non-volatile storage with connected word lines Jun 21, 2015 Issued
Array ( [id] => 10590384 [patent_doc_number] => 09312004 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-04-12 [patent_title] => 'Driver for semiconductor memory and system including the same' [patent_app_type] => utility [patent_app_number] => 14/746394 [patent_app_country] => US [patent_app_date] => 2015-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 6281 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14746394 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/746394
Driver for semiconductor memory and system including the same Jun 21, 2015 Issued
Array ( [id] => 11353458 [patent_doc_number] => 20160372198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-22 [patent_title] => 'MEMORY DEVICE HAVING ONLY THE TOP POLY CUT' [patent_app_type] => utility [patent_app_number] => 14/742944 [patent_app_country] => US [patent_app_date] => 2015-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4112 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14742944 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/742944
Memory device having only the top poly cut Jun 17, 2015 Issued
Array ( [id] => 11353462 [patent_doc_number] => 20160372202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-22 [patent_title] => 'NON-VOLATILE MEMORY DEVICE HAVING MULTIPLE STRING SELECT LINES' [patent_app_type] => utility [patent_app_number] => 14/742054 [patent_app_country] => US [patent_app_date] => 2015-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7111 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14742054 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/742054
Non-volatile memory device having multiple string select lines Jun 16, 2015 Issued
Array ( [id] => 11321418 [patent_doc_number] => 09520163 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-13 [patent_title] => 'Regulator circuit and semiconductor memory apparatus having the same' [patent_app_type] => utility [patent_app_number] => 14/740400 [patent_app_country] => US [patent_app_date] => 2015-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4294 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14740400 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/740400
Regulator circuit and semiconductor memory apparatus having the same Jun 15, 2015 Issued
Array ( [id] => 10425906 [patent_doc_number] => 20150310917 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-29 [patent_title] => 'Semiconductor Memory Having Both Volatile and Non-Volatile Functionality Including Resistance Change Material and Method of Operating' [patent_app_type] => utility [patent_app_number] => 14/738349 [patent_app_country] => US [patent_app_date] => 2015-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 15983 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14738349 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/738349
Semiconductor memory having both volatile and non-volatile functionality including resistance change material and method of operating Jun 11, 2015 Issued
Array ( [id] => 12038837 [patent_doc_number] => 09817065 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-14 [patent_title] => 'Test mode circuit and semiconductor device including the same' [patent_app_type] => utility [patent_app_number] => 14/738311 [patent_app_country] => US [patent_app_date] => 2015-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 6338 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14738311 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/738311
Test mode circuit and semiconductor device including the same Jun 11, 2015 Issued
Array ( [id] => 11925380 [patent_doc_number] => 09792965 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-17 [patent_title] => 'Memory module and system supporting parallel and serial access modes' [patent_app_type] => utility [patent_app_number] => 14/737147 [patent_app_country] => US [patent_app_date] => 2015-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5545 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14737147 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/737147
Memory module and system supporting parallel and serial access modes Jun 10, 2015 Issued
Array ( [id] => 10492952 [patent_doc_number] => 20150377974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-31 [patent_title] => 'BATTERY STATE ESTIMATION METHOD AND SYSTEM USING DUAL EXTENDED KALMAN FILTER, AND RECORDING MEDIUM FOR PERFORMING THE METHOD' [patent_app_type] => utility [patent_app_number] => 14/736640 [patent_app_country] => US [patent_app_date] => 2015-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5179 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14736640 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/736640
Battery state estimation method and system using dual extended kalman filter, and recording medium for performing the method Jun 10, 2015 Issued
Array ( [id] => 10394462 [patent_doc_number] => 20150279469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'NONVOLATILE MEMORY DEVICE, PROGRAM METHOD THEREOF, AND DATA PROCESSING SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/735397 [patent_app_country] => US [patent_app_date] => 2015-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6345 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14735397 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/735397
Program method of nonvolatile memory device for having dense threshold voltage distribution by controlling voltage of bit line according to threshold voltage of memory cell Jun 9, 2015 Issued
Array ( [id] => 14033359 [patent_doc_number] => 10228425 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-12 [patent_title] => Method and apparatus for learning and estimating battery state information [patent_app_type] => utility [patent_app_number] => 14/732098 [patent_app_country] => US [patent_app_date] => 2015-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 8042 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14732098 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/732098
Method and apparatus for learning and estimating battery state information Jun 4, 2015 Issued
Array ( [id] => 10384293 [patent_doc_number] => 20150269300 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-24 [patent_title] => 'Memory Controller for Heterogeneous Configurable Integrated Circuit' [patent_app_type] => utility [patent_app_number] => 14/729829 [patent_app_country] => US [patent_app_date] => 2015-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9452 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14729829 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/729829
Memory controller for heterogeneous configurable integrated circuit Jun 2, 2015 Issued
Array ( [id] => 11012520 [patent_doc_number] => 20160209474 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-21 [patent_title] => 'METHOD TO ESTIMATE THE CHARGING TIME OF LITHIUM-ION BATTERIES AND CHARGING MONITOR' [patent_app_type] => utility [patent_app_number] => 14/728968 [patent_app_country] => US [patent_app_date] => 2015-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4952 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14728968 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/728968
METHOD TO ESTIMATE THE CHARGING TIME OF LITHIUM-ION BATTERIES AND CHARGING MONITOR Jun 1, 2015 Abandoned
Array ( [id] => 11802088 [patent_doc_number] => 09542978 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-10 [patent_title] => 'Semiconductor package with terminals adjacent sides and corners' [patent_app_type] => utility [patent_app_number] => 14/729042 [patent_app_country] => US [patent_app_date] => 2015-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7971 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14729042 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/729042
Semiconductor package with terminals adjacent sides and corners Jun 1, 2015 Issued
Array ( [id] => 11259168 [patent_doc_number] => 09484071 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-01 [patent_title] => 'Voltage generation circuit, semiconductor memory apparatus having the same, and operating method thereof' [patent_app_type] => utility [patent_app_number] => 14/727053 [patent_app_country] => US [patent_app_date] => 2015-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3878 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14727053 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/727053
Voltage generation circuit, semiconductor memory apparatus having the same, and operating method thereof May 31, 2015 Issued
Array ( [id] => 11313219 [patent_doc_number] => 20160349330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-01 [patent_title] => 'SYSTEMS AND METHODS FOR DETERMINING VEHICLE BATTERY HEALTH' [patent_app_type] => utility [patent_app_number] => 14/727238 [patent_app_country] => US [patent_app_date] => 2015-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8734 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14727238 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/727238
Systems and methods for determining vehicle battery health May 31, 2015 Issued
Array ( [id] => 11265693 [patent_doc_number] => 09489993 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-08 [patent_title] => 'Semiconductor memory apparatus optimized for setting operation parameter and operating parameter setting method thereof' [patent_app_type] => utility [patent_app_number] => 14/723984 [patent_app_country] => US [patent_app_date] => 2015-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4384 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14723984 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/723984
Semiconductor memory apparatus optimized for setting operation parameter and operating parameter setting method thereof May 27, 2015 Issued
Array ( [id] => 10740816 [patent_doc_number] => 20160086967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-24 [patent_title] => 'NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/723296 [patent_app_country] => US [patent_app_date] => 2015-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 7833 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14723296 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/723296
Nonvolatile memory device May 26, 2015 Issued
Array ( [id] => 11259190 [patent_doc_number] => 09484092 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-01 [patent_title] => 'Intrinsic vertical bit line architecture' [patent_app_type] => utility [patent_app_number] => 14/715562 [patent_app_country] => US [patent_app_date] => 2015-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 62 [patent_figures_cnt] => 99 [patent_no_of_words] => 38343 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14715562 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/715562
Intrinsic vertical bit line architecture May 17, 2015 Issued
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