Angela J Lee

Array ( [id] => 11273503 [patent_doc_number] => 20160336050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-17 [patent_title] => 'COMPUTER ARCHITECTURE USING COMPUTE/STORAGE TILES' [patent_app_type] => utility [patent_app_number] => 14/709017 [patent_app_country] => US [patent_app_date] => 2015-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7363 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14709017 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11430826 [patent_doc_number] => 09569142 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-14 [patent_title] => 'Semiconductor device and method of operating the same according to degree of deterioration' [patent_app_type] => utility [patent_app_number] => 14/696003 [patent_app_country] => US [patent_app_date] => 2015-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4446 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14696003 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11807050 [patent_doc_number] => 09548134 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-17 [patent_title] => 'Semiconductor integrated circuit device and multi chip package including the same' [patent_app_type] => utility [patent_app_number] => 14/693426 [patent_app_country] => US [patent_app_date] => 2015-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4303 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14693426 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10651932 [patent_doc_number] => 09368194 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-14 [patent_title] => 'Semiconductor integrated circuit device and system with memory cell array' [patent_app_type] => utility [patent_app_number] => 14/692566 [patent_app_country] => US [patent_app_date] => 2015-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 37 [patent_no_of_words] => 31731 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14692566 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11846395 [patent_doc_number] => 09733949 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-15 [patent_title] => 'Semiconductor device capable of monitoring internal signal and method for driving the same' [patent_app_type] => utility [patent_app_number] => 14/686467 [patent_app_country] => US [patent_app_date] => 2015-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5794 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14686467 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10681340 [patent_doc_number] => 20160027485 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-28 [patent_title] => 'MEMORY DEVICES, MEMORY SYSTEMS, AND RELATED OPERATING METHODS' [patent_app_type] => utility [patent_app_number] => 14/683186 [patent_app_country] => US [patent_app_date] => 2015-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 18960 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14683186 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10802822 [patent_doc_number] => 20160148979 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-26 [patent_title] => 'ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/684039 [patent_app_country] => US [patent_app_date] => 2015-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12469 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14684039 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10794848 [patent_doc_number] => 20160141005 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-19 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF DRIVING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/680827 [patent_app_country] => US [patent_app_date] => 2015-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5961 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14680827 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11096271 [patent_doc_number] => 20160293241 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-06 [patent_title] => 'NONVOLATILE MEMORY INTERFACE FOR METADATA SHADOWING' [patent_app_type] => utility [patent_app_number] => 14/676292 [patent_app_country] => US [patent_app_date] => 2015-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5050 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14676292 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11279567 [patent_doc_number] => 09496048 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-15 [patent_title] => 'Differential one-time-programmable (OTP) memory array' [patent_app_type] => utility [patent_app_number] => 14/656699 [patent_app_country] => US [patent_app_date] => 2015-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 7054 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14656699 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11070996 [patent_doc_number] => 20160267959 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-15 [patent_title] => 'WRITE DRIVER CIRCUITS FOR RESISTIVE RANDOM ACCESS MEMORY (RAM) ARRAYS' [patent_app_type] => utility [patent_app_number] => 14/644631 [patent_app_country] => US [patent_app_date] => 2015-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9591 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14644631 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10725419 [patent_doc_number] => 20160071567 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-10 [patent_title] => 'RESISTANCE CHANGE MEMORY' [patent_app_type] => utility [patent_app_number] => 14/644148 [patent_app_country] => US [patent_app_date] => 2015-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7433 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14644148 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10673826 [patent_doc_number] => 20160019971 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-21 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/640563 [patent_app_country] => US [patent_app_date] => 2015-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 13518 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14640563 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11725290 [patent_doc_number] => 09698156 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-04 [patent_title] => 'Vertical thin-channel memory' [patent_app_type] => utility [patent_app_number] => 14/637187 [patent_app_country] => US [patent_app_date] => 2015-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 37 [patent_no_of_words] => 17984 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14637187 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10673814 [patent_doc_number] => 20160019959 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-21 [patent_title] => 'NONVOLATILE MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/635448 [patent_app_country] => US [patent_app_date] => 2015-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 10844 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14635448 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10732809 [patent_doc_number] => 20160078959 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-17 [patent_title] => 'NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/634701 [patent_app_country] => US [patent_app_date] => 2015-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12208 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14634701 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10463602 [patent_doc_number] => 20150348617 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-03 [patent_title] => 'HIGHLY COMPACT NON-VOLATILE MEMORY AND METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/622565 [patent_app_country] => US [patent_app_date] => 2015-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 13224 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14622565 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11035996 [patent_doc_number] => 20160232951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-11 [patent_title] => 'COMPUTE MEMORY' [patent_app_type] => utility [patent_app_number] => 14/614743 [patent_app_country] => US [patent_app_date] => 2015-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7327 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14614743 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11259166 [patent_doc_number] => 09484069 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-01 [patent_title] => 'Auxiliary power supply devices and nonvolatile memory systems including the same' [patent_app_type] => utility [patent_app_number] => 14/611763 [patent_app_country] => US [patent_app_date] => 2015-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8252 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14611763 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10645427 [patent_doc_number] => 09362302 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-06-07 [patent_title] => 'Source line formation in 3D vertical channel and memory' [patent_app_type] => utility [patent_app_number] => 14/608053 [patent_app_country] => US [patent_app_date] => 2015-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 6039 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14608053 [rel_patent_id] =>[rel_patent_doc_number] =>)