Search

Angela J Lee

Examiner (ID: 10714, Phone: (571)272-4453 , Office: P/2911 )

Most Active Art Unit
2911
Art Unit(s)
2911
Total Applications
4543
Issued Applications
4500
Pending Applications
13
Abandoned Applications
25

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11273014 [patent_doc_number] => 20160335560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-17 [patent_title] => 'CONSTRUCTING AND PROGRAMMING QUANTUM HARDWARE FOR ROBUST QUANTUM ANNEALING PROCESSES' [patent_app_type] => utility [patent_app_number] => 15/109614 [patent_app_country] => US [patent_app_date] => 2014-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6623 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15109614 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/109614
Constructing and programming quantum hardware for robust quantum annealing processes Dec 30, 2014 Issued
Array ( [id] => 11775847 [patent_doc_number] => 09384791 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-07-05 [patent_title] => 'Apparatus and method for sense amplifier offset cancellation' [patent_app_type] => utility [patent_app_number] => 14/586549 [patent_app_country] => US [patent_app_date] => 2014-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3332 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14586549 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/586549
Apparatus and method for sense amplifier offset cancellation Dec 29, 2014 Issued
Array ( [id] => 10631294 [patent_doc_number] => 09349448 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-24 [patent_title] => 'Operating a resistive array' [patent_app_type] => utility [patent_app_number] => 14/576909 [patent_app_country] => US [patent_app_date] => 2014-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7495 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14576909 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/576909
Operating a resistive array Dec 18, 2014 Issued
Array ( [id] => 10213288 [patent_doc_number] => 20150098280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-09 [patent_title] => 'TRACKING BIT CELL' [patent_app_type] => utility [patent_app_number] => 14/570259 [patent_app_country] => US [patent_app_date] => 2014-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7531 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14570259 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/570259
Tracking bit cell Dec 14, 2014 Issued
Array ( [id] => 10708245 [patent_doc_number] => 20160054392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-25 [patent_title] => 'APPARATUS AND METHOD FOR ESTIMATING STATE OF HEALTH OF BATTERY' [patent_app_type] => utility [patent_app_number] => 14/779825 [patent_app_country] => US [patent_app_date] => 2014-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4056 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14779825 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/779825
APPARATUS AND METHOD FOR ESTIMATING STATE OF HEALTH OF BATTERY Dec 4, 2014 Abandoned
Array ( [id] => 10752911 [patent_doc_number] => 20160099062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-07 [patent_title] => 'DATA WRITING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT' [patent_app_type] => utility [patent_app_number] => 14/556255 [patent_app_country] => US [patent_app_date] => 2014-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11664 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14556255 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/556255
Data writing method, memory storage device and memory control circuit unit Nov 30, 2014 Issued
Array ( [id] => 9929874 [patent_doc_number] => 20150078066 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-19 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD OF SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/552556 [patent_app_country] => US [patent_app_date] => 2014-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12100 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14552556 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/552556
SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD OF SEMICONDUCTOR MEMORY DEVICE Nov 24, 2014 Abandoned
Array ( [id] => 11094597 [patent_doc_number] => 20160291565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-06 [patent_title] => 'AUTOMATION SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/037244 [patent_app_country] => US [patent_app_date] => 2014-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3352 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15037244 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/037244
AUTOMATION SYSTEM Nov 16, 2014 Abandoned
Array ( [id] => 10638563 [patent_doc_number] => 09356074 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-05-31 [patent_title] => 'Memory array having divided apart bit lines and partially divided bit line selector switches' [patent_app_type] => utility [patent_app_number] => 14/543690 [patent_app_country] => US [patent_app_date] => 2014-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 33 [patent_no_of_words] => 28033 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 309 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14543690 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/543690
Memory array having divided apart bit lines and partially divided bit line selector switches Nov 16, 2014 Issued
Array ( [id] => 11090392 [patent_doc_number] => 20160287360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-06 [patent_title] => 'METHOD FOR DESIGNING ATTACHMENT ABUTMENTS FOR ATTACHING DENTURES TO THE MANDIBLE AND/OR MAXILLA' [patent_app_type] => utility [patent_app_number] => 15/035857 [patent_app_country] => US [patent_app_date] => 2014-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4890 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15035857 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/035857
Method for designing attachment abutments for attaching dentures to the mandible and/or maxilla Nov 10, 2014 Issued
Array ( [id] => 10787170 [patent_doc_number] => 20160133326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'APPARATUSES AND METHODS FOR NON-VOLATILE MEMORY PROGRAMMING SCHEMES' [patent_app_type] => utility [patent_app_number] => 14/538477 [patent_app_country] => US [patent_app_date] => 2014-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5977 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14538477 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/538477
Apparatuses and methods for non-volatile memory programming schemes Nov 10, 2014 Issued
Array ( [id] => 10597112 [patent_doc_number] => 09318206 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-19 [patent_title] => 'Selective word line erase in 3D non-volatile memory' [patent_app_type] => utility [patent_app_number] => 14/536923 [patent_app_country] => US [patent_app_date] => 2014-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 36 [patent_no_of_words] => 13256 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14536923 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/536923
Selective word line erase in 3D non-volatile memory Nov 9, 2014 Issued
Array ( [id] => 10358350 [patent_doc_number] => 20150243355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-27 [patent_title] => 'VARIABLE RESISTANCE MEMORY DEVICE AND RELATED PROGRAMMING METHOD DESIGNED TO REDUCE PEAK CURRENT' [patent_app_type] => utility [patent_app_number] => 14/532105 [patent_app_country] => US [patent_app_date] => 2014-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5843 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14532105 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/532105
VARIABLE RESISTANCE MEMORY DEVICE AND RELATED PROGRAMMING METHOD DESIGNED TO REDUCE PEAK CURRENT Nov 3, 2014 Abandoned
Array ( [id] => 11745618 [patent_doc_number] => 20170199692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-13 [patent_title] => 'SHARED BACKUP POWER SELF-REFRESH MODE' [patent_app_type] => utility [patent_app_number] => 15/324977 [patent_app_country] => US [patent_app_date] => 2014-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6357 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15324977 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/324977
Shared backup power self-refresh mode Oct 30, 2014 Issued
Array ( [id] => 11097246 [patent_doc_number] => 20160294215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-06 [patent_title] => 'POWER CONTROL SYSTEM, POWER CONTROL METHOD, AND RECORDING MEDIUM' [patent_app_type] => utility [patent_app_number] => 15/033612 [patent_app_country] => US [patent_app_date] => 2014-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12490 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15033612 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/033612
Power control system, power control method, and recording medium Oct 28, 2014 Issued
Array ( [id] => 10617443 [patent_doc_number] => 09336890 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-05-10 [patent_title] => 'Simultaneous programming of many bits in flash memory' [patent_app_type] => utility [patent_app_number] => 14/517201 [patent_app_country] => US [patent_app_date] => 2014-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 6804 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14517201 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/517201
Simultaneous programming of many bits in flash memory Oct 16, 2014 Issued
Array ( [id] => 10597092 [patent_doc_number] => 09318185 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-19 [patent_title] => 'Memory module and memory system including the same' [patent_app_type] => utility [patent_app_number] => 14/517255 [patent_app_country] => US [patent_app_date] => 2014-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 23 [patent_no_of_words] => 13609 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14517255 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/517255
Memory module and memory system including the same Oct 16, 2014 Issued
Array ( [id] => 11042507 [patent_doc_number] => 20160239464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-18 [patent_title] => 'Method and System for Tracking the Centre of a Peak from a plurality of Sample Points in an Optical System' [patent_app_type] => utility [patent_app_number] => 15/029716 [patent_app_country] => US [patent_app_date] => 2014-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5040 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15029716 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/029716
Method and system for tracking the centre of a peak from a plurality of sample points in an optical system Oct 15, 2014 Issued
Array ( [id] => 10752880 [patent_doc_number] => 20160099032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-07 [patent_title] => 'BI-SYNCHRONOUS ELECTRONIC DEVICE AND FIFO MEMORY CIRCUIT WITH JUMP CANDIDATES AND RELATED METHODS' [patent_app_type] => utility [patent_app_number] => 14/508321 [patent_app_country] => US [patent_app_date] => 2014-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3486 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14508321 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/508321
Bi-synchronous electronic device and FIFO memory circuit with jump candidates and related methods Oct 6, 2014 Issued
Array ( [id] => 11483093 [patent_doc_number] => 09589645 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-07 [patent_title] => 'Block refresh to adapt to new die trim settings' [patent_app_type] => utility [patent_app_number] => 14/507245 [patent_app_country] => US [patent_app_date] => 2014-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 7539 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14507245 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/507245
Block refresh to adapt to new die trim settings Oct 5, 2014 Issued
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