Search

Angela J Lee

Examiner (ID: 10714, Phone: (571)272-4453 , Office: P/2911 )

Most Active Art Unit
2911
Art Unit(s)
2911
Total Applications
4543
Issued Applications
4500
Pending Applications
13
Abandoned Applications
25

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19046473 [patent_doc_number] => 11935592 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Resistive memory device for writing data and operating method thereof [patent_app_type] => utility [patent_app_number] => 17/328248 [patent_app_country] => US [patent_app_date] => 2021-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9977 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17328248 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/328248
Resistive memory device for writing data and operating method thereof May 23, 2021 Issued
Array ( [id] => 17217500 [patent_doc_number] => 20210350838 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => MEMORY MODULE AND SYSTEM SUPPORTING PARALLEL AND SERIAL ACCESS MODES [patent_app_type] => utility [patent_app_number] => 17/328211 [patent_app_country] => US [patent_app_date] => 2021-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5345 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17328211 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/328211
Memory module and system supporting parallel and serial access modes May 23, 2021 Issued
Array ( [id] => 18415819 [patent_doc_number] => 11670364 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Artificial reality system with reduced SRAM power leakage [patent_app_type] => utility [patent_app_number] => 17/303084 [patent_app_country] => US [patent_app_date] => 2021-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 17087 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17303084 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/303084
Artificial reality system with reduced SRAM power leakage May 18, 2021 Issued
Array ( [id] => 18205213 [patent_doc_number] => 11587615 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-21 [patent_title] => Cross-point memory compensation [patent_app_type] => utility [patent_app_number] => 17/316271 [patent_app_country] => US [patent_app_date] => 2021-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 9084 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17316271 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/316271
Cross-point memory compensation May 9, 2021 Issued
Array ( [id] => 18857023 [patent_doc_number] => 11854614 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Electronic device and manufacturing method of electronic device [patent_app_type] => utility [patent_app_number] => 17/315194 [patent_app_country] => US [patent_app_date] => 2021-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 29 [patent_no_of_words] => 11274 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17315194 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/315194
Electronic device and manufacturing method of electronic device May 6, 2021 Issued
Array ( [id] => 18462995 [patent_doc_number] => 11687283 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-27 [patent_title] => Memory module interfaces [patent_app_type] => utility [patent_app_number] => 17/306566 [patent_app_country] => US [patent_app_date] => 2021-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6424 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17306566 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/306566
Memory module interfaces May 2, 2021 Issued
Array ( [id] => 19079286 [patent_doc_number] => 11948661 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-02 [patent_title] => Methods for tuning command/address bus timing and memory devices and memory systems using the same [patent_app_type] => utility [patent_app_number] => 17/244942 [patent_app_country] => US [patent_app_date] => 2021-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6423 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17244942 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/244942
Methods for tuning command/address bus timing and memory devices and memory systems using the same Apr 28, 2021 Issued
Array ( [id] => 17158769 [patent_doc_number] => 20210319820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-14 [patent_title] => SENSE AMPLIFIER WITH SPLIT CAPACITORS [patent_app_type] => utility [patent_app_number] => 17/241889 [patent_app_country] => US [patent_app_date] => 2021-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19411 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17241889 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/241889
Sense amplifier with split capacitors Apr 26, 2021 Issued
Array ( [id] => 18292158 [patent_doc_number] => 11621031 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-04 [patent_title] => Apparatuses and systems for providing power to a memory [patent_app_type] => utility [patent_app_number] => 17/302206 [patent_app_country] => US [patent_app_date] => 2021-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5740 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17302206 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/302206
Apparatuses and systems for providing power to a memory Apr 26, 2021 Issued
Array ( [id] => 17025200 [patent_doc_number] => 20210249072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-12 [patent_title] => METHOD OF PROGRAMMING MEMORY DEVICE AND RELATED MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/241010 [patent_app_country] => US [patent_app_date] => 2021-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3690 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17241010 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/241010
Method of programming memory device and related memory device Apr 25, 2021 Issued
Array ( [id] => 18137086 [patent_doc_number] => 11562774 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-24 [patent_title] => Semiconductor device having a memory and method of controlling the same between operation modes [patent_app_type] => utility [patent_app_number] => 17/231572 [patent_app_country] => US [patent_app_date] => 2021-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7101 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17231572 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/231572
Semiconductor device having a memory and method of controlling the same between operation modes Apr 14, 2021 Issued
Array ( [id] => 18950800 [patent_doc_number] => 11894103 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-06 [patent_title] => Decoding architecture for word line tiles [patent_app_type] => utility [patent_app_number] => 17/231661 [patent_app_country] => US [patent_app_date] => 2021-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 23090 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 359 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17231661 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/231661
Decoding architecture for word line tiles Apr 14, 2021 Issued
Array ( [id] => 16981176 [patent_doc_number] => 20210225413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => BANK AND CHANNEL STRUCTURE OF STACKED SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/222353 [patent_app_country] => US [patent_app_date] => 2021-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6597 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17222353 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/222353
Bank and channel structure of stacked semiconductor device Apr 4, 2021 Issued
Array ( [id] => 17971114 [patent_doc_number] => 11488661 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Memory device including memory cells and edge cells [patent_app_type] => utility [patent_app_number] => 17/220701 [patent_app_country] => US [patent_app_date] => 2021-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6034 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17220701 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/220701
Memory device including memory cells and edge cells Mar 31, 2021 Issued
Array ( [id] => 17900967 [patent_doc_number] => 20220310629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => EIGHT-TRANSISTOR STATIC RANDOM ACCESS MEMORY CELL [patent_app_type] => utility [patent_app_number] => 17/211903 [patent_app_country] => US [patent_app_date] => 2021-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12459 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17211903 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/211903
Eight-transistor static random access memory cell Mar 24, 2021 Issued
Array ( [id] => 17485684 [patent_doc_number] => 20220093188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/202661 [patent_app_country] => US [patent_app_date] => 2021-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 46066 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17202661 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/202661
Semiconductor device Mar 15, 2021 Issued
Array ( [id] => 16981611 [patent_doc_number] => 20210225848 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => SEMICONDUCTOR DEVICE WITH FIRST-IN-FIRST-OUT CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/202144 [patent_app_country] => US [patent_app_date] => 2021-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8726 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17202144 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/202144
Semiconductor device with first-in-first-out circuit Mar 14, 2021 Issued
Array ( [id] => 18016121 [patent_doc_number] => 11508424 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-22 [patent_title] => Variable resistance memory device [patent_app_type] => utility [patent_app_number] => 17/198495 [patent_app_country] => US [patent_app_date] => 2021-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 16826 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17198495 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/198495
Variable resistance memory device Mar 10, 2021 Issued
Array ( [id] => 18857034 [patent_doc_number] => 11854625 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Device and method for operating the same [patent_app_type] => utility [patent_app_number] => 17/191892 [patent_app_country] => US [patent_app_date] => 2021-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5035 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17191892 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/191892
Device and method for operating the same Mar 3, 2021 Issued
Array ( [id] => 18174964 [patent_doc_number] => 11574681 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-07 [patent_title] => Semiconductor storage device having voltage erasing operation capability and control method thereof [patent_app_type] => utility [patent_app_number] => 17/190856 [patent_app_country] => US [patent_app_date] => 2021-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6188 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17190856 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/190856
Semiconductor storage device having voltage erasing operation capability and control method thereof Mar 2, 2021 Issued
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