Search

Angela J Lee

Examiner (ID: 10714, Phone: (571)272-4453 , Office: P/2911 )

Most Active Art Unit
2911
Art Unit(s)
2911
Total Applications
4543
Issued Applications
4500
Pending Applications
13
Abandoned Applications
25

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17158759 [patent_doc_number] => 20210319810 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-14 [patent_title] => METHOD AND APPARATUS FOR ACCESSING TO DATA IN RESPONSE TO POWER-SUPPLY EVENT [patent_app_type] => utility [patent_app_number] => 17/108681 [patent_app_country] => US [patent_app_date] => 2020-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5798 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17108681 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/108681
Method and apparatus for accessing to data in response to power-supply event Nov 30, 2020 Issued
Array ( [id] => 17757978 [patent_doc_number] => 11398276 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-26 [patent_title] => Decoder architecture for memory device [patent_app_type] => utility [patent_app_number] => 17/108763 [patent_app_country] => US [patent_app_date] => 2020-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 15830 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17108763 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/108763
Decoder architecture for memory device Nov 30, 2020 Issued
Array ( [id] => 16765290 [patent_doc_number] => 20210110872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-15 [patent_title] => Semiconductor Memory Having Both Volatile and Non-Volatile Functionality Including Resistance Change Material and Method of Operating [patent_app_type] => utility [patent_app_number] => 17/107904 [patent_app_country] => US [patent_app_date] => 2020-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15585 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17107904 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/107904
Semiconductor memory having both volatile and non-volatile functionality including resistance change material and method of operating Nov 29, 2020 Issued
Array ( [id] => 16715349 [patent_doc_number] => 20210082496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => Read Assist Circuitry for Memory Applications [patent_app_type] => utility [patent_app_number] => 17/107559 [patent_app_country] => US [patent_app_date] => 2020-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6216 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17107559 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/107559
Read assist circuitry for memory applications Nov 29, 2020 Issued
Array ( [id] => 18331646 [patent_doc_number] => 11636896 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-25 [patent_title] => Memory cell array circuit and method of forming the same [patent_app_type] => utility [patent_app_number] => 17/103239 [patent_app_country] => US [patent_app_date] => 2020-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 14945 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17103239 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/103239
Memory cell array circuit and method of forming the same Nov 23, 2020 Issued
Array ( [id] => 18736945 [patent_doc_number] => 11805701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-31 [patent_title] => Memory and forming methods and control methods thereof [patent_app_type] => utility [patent_app_number] => 17/310366 [patent_app_country] => US [patent_app_date] => 2020-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5814 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17310366 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/310366
Memory and forming methods and control methods thereof Nov 10, 2020 Issued
Array ( [id] => 17599081 [patent_doc_number] => 20220148655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => DRIFT AND NOISE CORRECTED MEMRISTIVE DEVICE [patent_app_type] => utility [patent_app_number] => 17/094744 [patent_app_country] => US [patent_app_date] => 2020-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4973 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17094744 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/094744
Drift and noise corrected memristive device Nov 9, 2020 Issued
Array ( [id] => 17606899 [patent_doc_number] => 11335391 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-05-17 [patent_title] => Memory cell arrangement and method thereof [patent_app_type] => utility [patent_app_number] => 17/085084 [patent_app_country] => US [patent_app_date] => 2020-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 55482 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17085084 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/085084
Memory cell arrangement and method thereof Oct 29, 2020 Issued
Array ( [id] => 16936100 [patent_doc_number] => 20210201989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/085420 [patent_app_country] => US [patent_app_date] => 2020-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7831 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17085420 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/085420
Memory device having a comparator circuit Oct 29, 2020 Issued
Array ( [id] => 17529696 [patent_doc_number] => 11302394 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-12 [patent_title] => Adaptive memory cell write conditions [patent_app_type] => utility [patent_app_number] => 17/081092 [patent_app_country] => US [patent_app_date] => 2020-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5768 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17081092 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/081092
Adaptive memory cell write conditions Oct 26, 2020 Issued
Array ( [id] => 17455908 [patent_doc_number] => 11270774 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => Apparatus for calibrating sensing of memory cell data states [patent_app_type] => utility [patent_app_number] => 17/079594 [patent_app_country] => US [patent_app_date] => 2020-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 15248 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17079594 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/079594
Apparatus for calibrating sensing of memory cell data states Oct 25, 2020 Issued
Array ( [id] => 17573923 [patent_doc_number] => 11322197 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-05-03 [patent_title] => Power-gating techniques with buried metal [patent_app_type] => utility [patent_app_number] => 17/076540 [patent_app_country] => US [patent_app_date] => 2020-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5247 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17076540 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/076540
Power-gating techniques with buried metal Oct 20, 2020 Issued
Array ( [id] => 17558889 [patent_doc_number] => 11315608 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-26 [patent_title] => Semiconductor device and semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/076515 [patent_app_country] => US [patent_app_date] => 2020-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 6104 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17076515 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/076515
Semiconductor device and semiconductor memory device Oct 20, 2020 Issued
Array ( [id] => 17551320 [patent_doc_number] => 20220122662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => DEVICE COMPRISING TUNABLE RESISTIVE ELEMENTS [patent_app_type] => utility [patent_app_number] => 17/074763 [patent_app_country] => US [patent_app_date] => 2020-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8076 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17074763 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/074763
Device comprising tunable resistive elements Oct 19, 2020 Issued
Array ( [id] => 17772161 [patent_doc_number] => 11404112 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-02 [patent_title] => Low-voltage low-power memory device with read, write, hold, and standby assist voltages and operation method thereof [patent_app_type] => utility [patent_app_number] => 17/073672 [patent_app_country] => US [patent_app_date] => 2020-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 15945 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 1040 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17073672 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/073672
Low-voltage low-power memory device with read, write, hold, and standby assist voltages and operation method thereof Oct 18, 2020 Issued
Array ( [id] => 19610790 [patent_doc_number] => 12159670 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-03 [patent_title] => Non-volatile storage circuit [patent_app_type] => utility [patent_app_number] => 17/766568 [patent_app_country] => US [patent_app_date] => 2020-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 13644 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17766568 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/766568
Non-volatile storage circuit Oct 15, 2020 Issued
Array ( [id] => 17181112 [patent_doc_number] => 11158360 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-10-26 [patent_title] => Memory device with voltage boosting circuit [patent_app_type] => utility [patent_app_number] => 17/070931 [patent_app_country] => US [patent_app_date] => 2020-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5523 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17070931 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/070931
Memory device with voltage boosting circuit Oct 14, 2020 Issued
Array ( [id] => 16601281 [patent_doc_number] => 20210027812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-28 [patent_title] => CROSS POINT ARRAY MEMORY IN A NON-VOLATILE DUAL IN-LINE MEMORY MODULE [patent_app_type] => utility [patent_app_number] => 16/949036 [patent_app_country] => US [patent_app_date] => 2020-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8669 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16949036 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/949036
Cross point array memory in a non-volatile dual in-line memory module Oct 8, 2020 Issued
Array ( [id] => 17500447 [patent_doc_number] => 11289157 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-03-29 [patent_title] => Memory device [patent_app_type] => utility [patent_app_number] => 17/012077 [patent_app_country] => US [patent_app_date] => 2020-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 25 [patent_no_of_words] => 4202 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17012077 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/012077
Memory device Sep 3, 2020 Issued
Array ( [id] => 18131126 [patent_doc_number] => 11557341 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-17 [patent_title] => Memory array structures and methods for determination of resistive characteristics of access lines [patent_app_type] => utility [patent_app_number] => 17/011018 [patent_app_country] => US [patent_app_date] => 2020-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 11789 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17011018 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/011018
Memory array structures and methods for determination of resistive characteristics of access lines Sep 2, 2020 Issued
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