Search

Angelica M Mckinney

Examiner (ID: 15529, Phone: (571)270-3321 , Office: P/2653 )

Most Active Art Unit
2653
Art Unit(s)
2653, 2694
Total Applications
528
Issued Applications
405
Pending Applications
54
Abandoned Applications
69

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11328046 [patent_doc_number] => 20160358657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-08 [patent_title] => 'NONVOLATILE MEMORY DEVICE AND PROGRAM METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/083834 [patent_app_country] => US [patent_app_date] => 2016-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 57 [patent_no_of_words] => 32376 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15083834 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/083834
Nonvolatile memory device and program method thereof Mar 28, 2016 Issued
Array ( [id] => 11096264 [patent_doc_number] => 20160293232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-06 [patent_title] => 'MEMORY DEVICE, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 15/083776 [patent_app_country] => US [patent_app_date] => 2016-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 32681 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15083776 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/083776
Memory device, semiconductor device, and electronic device Mar 28, 2016 Issued
Array ( [id] => 11637642 [patent_doc_number] => 09659623 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-05-23 [patent_title] => 'Memory having a plurality of resistive non-volatile memory cells' [patent_app_type] => utility [patent_app_number] => 15/082419 [patent_app_country] => US [patent_app_date] => 2016-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6067 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15082419 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/082419
Memory having a plurality of resistive non-volatile memory cells Mar 27, 2016 Issued
Array ( [id] => 11694162 [patent_doc_number] => 20170169879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-15 [patent_title] => 'SEMICONDUCTOR DEVICES AND SEMICONDUCTOR SYSTEMS INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/080904 [patent_app_country] => US [patent_app_date] => 2016-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6818 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15080904 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/080904
SEMICONDUCTOR DEVICES AND SEMICONDUCTOR SYSTEMS INCLUDING THE SAME Mar 24, 2016 Abandoned
Array ( [id] => 11701565 [patent_doc_number] => 09691488 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-06-27 [patent_title] => 'Dynamically adjusting read voltage in a NAND flash memory' [patent_app_type] => utility [patent_app_number] => 15/065779 [patent_app_country] => US [patent_app_date] => 2016-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 4686 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15065779 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/065779
Dynamically adjusting read voltage in a NAND flash memory Mar 8, 2016 Issued
Array ( [id] => 11391014 [patent_doc_number] => 09552257 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-24 [patent_title] => 'Memory cell coupling compensation' [patent_app_type] => utility [patent_app_number] => 15/059367 [patent_app_country] => US [patent_app_date] => 2016-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 7667 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15059367 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/059367
Memory cell coupling compensation Mar 2, 2016 Issued
Array ( [id] => 15136387 [patent_doc_number] => 10481659 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Rack resource utilization [patent_app_type] => utility [patent_app_number] => 15/059870 [patent_app_country] => US [patent_app_date] => 2016-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4932 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15059870 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/059870
Rack resource utilization Mar 2, 2016 Issued
Array ( [id] => 11043282 [patent_doc_number] => 20160240238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-18 [patent_title] => 'Setting of Reference Voltage for Data Sensing in Ferroelectric Memories' [patent_app_type] => utility [patent_app_number] => 15/019026 [patent_app_country] => US [patent_app_date] => 2016-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8433 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15019026 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/019026
Setting of reference voltage for data sensing in ferroelectric memories Feb 8, 2016 Issued
Array ( [id] => 11838289 [patent_doc_number] => 20170220009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-03 [patent_title] => 'Work Site Perception System' [patent_app_type] => utility [patent_app_number] => 15/012538 [patent_app_country] => US [patent_app_date] => 2016-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5626 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15012538 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/012538
Work site perception system Jan 31, 2016 Issued
Array ( [id] => 11417369 [patent_doc_number] => 09564201 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-07 [patent_title] => 'Method, apparatus and system for responding to a row hammer event' [patent_app_type] => utility [patent_app_number] => 15/011286 [patent_app_country] => US [patent_app_date] => 2016-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10108 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15011286 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/011286
Method, apparatus and system for responding to a row hammer event Jan 28, 2016 Issued
Array ( [id] => 11746437 [patent_doc_number] => 20170200510 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-13 [patent_title] => 'METHOD AND DEVICE FOR READING A MEMORY' [patent_app_type] => utility [patent_app_number] => 14/994472 [patent_app_country] => US [patent_app_date] => 2016-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5829 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14994472 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/994472
Method and device for reading a memory Jan 12, 2016 Issued
Array ( [id] => 11571524 [patent_doc_number] => 20170110168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-20 [patent_title] => 'CLOCK CONTROL DEVICE' [patent_app_type] => utility [patent_app_number] => 14/992614 [patent_app_country] => US [patent_app_date] => 2016-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6708 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14992614 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/992614
Clock control device Jan 10, 2016 Issued
Array ( [id] => 10786230 [patent_doc_number] => 20160132386 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/982049 [patent_app_country] => US [patent_app_date] => 2015-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8114 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14982049 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/982049
Semiconductor device and driving method thereof Dec 28, 2015 Issued
Array ( [id] => 10758372 [patent_doc_number] => 20160104525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-14 [patent_title] => 'METHOD OF WRITING MEMORY WITH REGULATED GROUND NODES' [patent_app_type] => utility [patent_app_number] => 14/972908 [patent_app_country] => US [patent_app_date] => 2015-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6107 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14972908 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/972908
Method of writing memory with regulated ground nodes Dec 16, 2015 Issued
Array ( [id] => 11315154 [patent_doc_number] => 20160351264 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-01 [patent_title] => 'NON-VOLATILE MEMORY DEVICE AND CORRESPONDING OPERATING METHOD WITH STRESS REDUCTION' [patent_app_type] => utility [patent_app_number] => 14/970732 [patent_app_country] => US [patent_app_date] => 2015-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5965 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14970732 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/970732
Non-volatile memory device and corresponding operating method with stress reduction Dec 15, 2015 Issued
Array ( [id] => 11862042 [patent_doc_number] => 09741734 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-22 [patent_title] => 'Memory devices and systems having reduced bit line to drain select gate shorting and associated methods' [patent_app_type] => utility [patent_app_number] => 14/970288 [patent_app_country] => US [patent_app_date] => 2015-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 6429 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14970288 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/970288
Memory devices and systems having reduced bit line to drain select gate shorting and associated methods Dec 14, 2015 Issued
Array ( [id] => 10825893 [patent_doc_number] => 20160172060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-16 [patent_title] => 'MEMORY DEVICE, METHOD OF GENERATING LOG OF COMMAND SIGNALS/ADDRESS SIGNALS OF MEMORY DEVICE, AND METHOD OF ANALYZING ERRORS OF MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/968898 [patent_app_country] => US [patent_app_date] => 2015-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10123 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14968898 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/968898
Memory device, method of generating log of command signals/address signals of memory device, and method of analyzing errors of memory device Dec 14, 2015 Issued
Array ( [id] => 11615267 [patent_doc_number] => 09653127 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-05-16 [patent_title] => 'Methods and apparatuses for modulating threshold voltages of memory cells' [patent_app_type] => utility [patent_app_number] => 14/970380 [patent_app_country] => US [patent_app_date] => 2015-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6788 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14970380 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/970380
Methods and apparatuses for modulating threshold voltages of memory cells Dec 14, 2015 Issued
Array ( [id] => 11694172 [patent_doc_number] => 20170169890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-15 [patent_title] => 'DYNAMICALLY ADJUSTING READ VOLTAGE IN A NAND FLASH MEMORY' [patent_app_type] => utility [patent_app_number] => 14/969196 [patent_app_country] => US [patent_app_date] => 2015-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4684 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14969196 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/969196
Dynamically adjusting read voltage in a NAND flash memory Dec 14, 2015 Issued
Array ( [id] => 11259959 [patent_doc_number] => 09484872 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-11-01 [patent_title] => 'Amplifier circuit with static consumption control and corresponding control method' [patent_app_type] => utility [patent_app_number] => 14/969042 [patent_app_country] => US [patent_app_date] => 2015-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5298 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14969042 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/969042
Amplifier circuit with static consumption control and corresponding control method Dec 14, 2015 Issued
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