Search

Angelica M Mckinney

Examiner (ID: 15529, Phone: (571)270-3321 , Office: P/2653 )

Most Active Art Unit
2653
Art Unit(s)
2653, 2694
Total Applications
528
Issued Applications
405
Pending Applications
54
Abandoned Applications
69

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9128685 [patent_doc_number] => 08576641 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-11-05 [patent_title] => 'Method of and circuit for providing non-volatile memory in an integrated circuit' [patent_app_type] => utility [patent_app_number] => 12/714216 [patent_app_country] => US [patent_app_date] => 2010-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 8461 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12714216 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/714216
Method of and circuit for providing non-volatile memory in an integrated circuit Feb 25, 2010 Issued
Array ( [id] => 5934685 [patent_doc_number] => 20110211398 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-01 [patent_title] => 'MEMORY DEVICE AND ASSOCIATED MAIN WORD LINE AND WORD LINE DRIVING CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/713708 [patent_app_country] => US [patent_app_date] => 2010-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2645 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0211/20110211398.pdf [firstpage_image] =>[orig_patent_app_number] => 12713708 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/713708
Memory device and associated main word line and word line driving circuit Feb 25, 2010 Issued
Array ( [id] => 5934688 [patent_doc_number] => 20110211401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-01 [patent_title] => 'GLOBAL BIT SELECT CIRCUIT INTERFACE WITH SIMPLIFIED WRITE BIT LINE PRECHARGING' [patent_app_type] => utility [patent_app_number] => 12/713670 [patent_app_country] => US [patent_app_date] => 2010-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3393 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0211/20110211401.pdf [firstpage_image] =>[orig_patent_app_number] => 12713670 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/713670
Global bit select circuit interface with simplified write bit line precharging Feb 25, 2010 Issued
Array ( [id] => 6201123 [patent_doc_number] => 20110063909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-17 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY AND METHOD OF TESTING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/713674 [patent_app_country] => US [patent_app_date] => 2010-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6368 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20110063909.pdf [firstpage_image] =>[orig_patent_app_number] => 12713674 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/713674
NONVOLATILE SEMICONDUCTOR MEMORY AND METHOD OF TESTING THE SAME Feb 25, 2010 Abandoned
Array ( [id] => 8550655 [patent_doc_number] => 08325543 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-04 [patent_title] => 'Global bit select circuit interface with false write through blocking' [patent_app_type] => utility [patent_app_number] => 12/713636 [patent_app_country] => US [patent_app_date] => 2010-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3872 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12713636 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/713636
Global bit select circuit interface with false write through blocking Feb 25, 2010 Issued
Array ( [id] => 6289584 [patent_doc_number] => 20100238722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICES AND VOLTAGE CONTROL CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/711574 [patent_app_country] => US [patent_app_date] => 2010-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5822 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20100238722.pdf [firstpage_image] =>[orig_patent_app_number] => 12711574 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/711574
NONVOLATILE SEMICONDUCTOR MEMORY DEVICES AND VOLTAGE CONTROL CIRCUIT Feb 23, 2010 Abandoned
Array ( [id] => 6537339 [patent_doc_number] => 20100232213 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-16 [patent_title] => 'CONTROL SIGNAL TRANSMITTING SYSTEM OF A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/711586 [patent_app_country] => US [patent_app_date] => 2010-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5633 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0232/20100232213.pdf [firstpage_image] =>[orig_patent_app_number] => 12711586 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/711586
CONTROL SIGNAL TRANSMITTING SYSTEM OF A SEMICONDUCTOR DEVICE Feb 23, 2010 Abandoned
Array ( [id] => 6520312 [patent_doc_number] => 20100220526 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-02 [patent_title] => 'NONVOLATILE MEMORY DEVICE, SYSTEM, AND PROGRAMMING METHOD' [patent_app_type] => utility [patent_app_number] => 12/711450 [patent_app_country] => US [patent_app_date] => 2010-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5827 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20100220526.pdf [firstpage_image] =>[orig_patent_app_number] => 12711450 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/711450
Nonvolatile memory device, system, and programming method Feb 23, 2010 Issued
Array ( [id] => 6044789 [patent_doc_number] => 20110205793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'METHOD FOR ACCESSING MULTI-LEVEL NON-VOLATILE MEMORY CELL' [patent_app_type] => utility [patent_app_number] => 12/712184 [patent_app_country] => US [patent_app_date] => 2010-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5718 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20110205793.pdf [firstpage_image] =>[orig_patent_app_number] => 12712184 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/712184
METHOD FOR ACCESSING MULTI-LEVEL NON-VOLATILE MEMORY CELL Feb 23, 2010 Abandoned
Array ( [id] => 6044861 [patent_doc_number] => 20110205828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'SEMICONDUCTOR MEMORY WITH MEMORY CELL PORTIONS HAVING DIFFERENT ACCESS SPEEDS' [patent_app_type] => utility [patent_app_number] => 12/710800 [patent_app_country] => US [patent_app_date] => 2010-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2665 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20110205828.pdf [firstpage_image] =>[orig_patent_app_number] => 12710800 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/710800
Semiconductor memory with memory cell portions having different access speeds Feb 22, 2010 Issued
Array ( [id] => 6483825 [patent_doc_number] => 20100208512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-19 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE PROVIDED WITH RESISTANCE CHANGE ELEMENT' [patent_app_type] => utility [patent_app_number] => 12/709256 [patent_app_country] => US [patent_app_date] => 2010-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4389 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0208/20100208512.pdf [firstpage_image] =>[orig_patent_app_number] => 12709256 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/709256
SEMICONDUCTOR MEMORY DEVICE PROVIDED WITH RESISTANCE CHANGE ELEMENT Feb 18, 2010 Abandoned
Array ( [id] => 9287706 [patent_doc_number] => 08644046 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-04 [patent_title] => 'Non-volatile memory devices including vertical NAND channels and methods of forming the same' [patent_app_type] => utility [patent_app_number] => 12/701246 [patent_app_country] => US [patent_app_date] => 2010-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 50 [patent_no_of_words] => 7520 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12701246 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/701246
Non-volatile memory devices including vertical NAND channels and methods of forming the same Feb 4, 2010 Issued
Array ( [id] => 6384993 [patent_doc_number] => 20100302852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-02 [patent_title] => 'NONVOLATILE MEMORY DEVICE AND METHOD OF VERIFYING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/650978 [patent_app_country] => US [patent_app_date] => 2009-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5128 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20100302852.pdf [firstpage_image] =>[orig_patent_app_number] => 12650978 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/650978
Nonvolatile memory device and method of verifying the same Dec 30, 2009 Issued
Array ( [id] => 6508222 [patent_doc_number] => 20100202197 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-12 [patent_title] => 'OPERATION METHODS OF NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/651038 [patent_app_country] => US [patent_app_date] => 2009-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4561 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20100202197.pdf [firstpage_image] =>[orig_patent_app_number] => 12651038 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/651038
OPERATION METHODS OF NONVOLATILE MEMORY DEVICE Dec 30, 2009 Abandoned
Array ( [id] => 6491800 [patent_doc_number] => 20100214848 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-26 [patent_title] => 'NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/651054 [patent_app_country] => US [patent_app_date] => 2009-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8341 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20100214848.pdf [firstpage_image] =>[orig_patent_app_number] => 12651054 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/651054
Nonvolatile memory device and method of operating the same Dec 30, 2009 Issued
Array ( [id] => 5942542 [patent_doc_number] => 20110103162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-05 [patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/650882 [patent_app_country] => US [patent_app_date] => 2009-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5621 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20110103162.pdf [firstpage_image] =>[orig_patent_app_number] => 12650882 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/650882
SEMICONDUCTOR MEMORY APPARATUS Dec 30, 2009 Abandoned
Array ( [id] => 8318548 [patent_doc_number] => 08233334 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-31 [patent_title] => 'Code address memory (CAM) cell read control circuit of semiconductor memory device and method of reading data of CAM cell' [patent_app_type] => utility [patent_app_number] => 12/650980 [patent_app_country] => US [patent_app_date] => 2009-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3066 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12650980 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/650980
Code address memory (CAM) cell read control circuit of semiconductor memory device and method of reading data of CAM cell Dec 30, 2009 Issued
Array ( [id] => 6286109 [patent_doc_number] => 20100157647 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-24 [patent_title] => 'Memory access circuits and layout of the same for cross-point memory arrays' [patent_app_type] => utility [patent_app_number] => 12/653898 [patent_app_country] => US [patent_app_date] => 2009-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8679 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20100157647.pdf [firstpage_image] =>[orig_patent_app_number] => 12653898 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/653898
Memory access circuits and layout of the same for cross-point memory arrays Dec 17, 2009 Abandoned
Array ( [id] => 8117273 [patent_doc_number] => 08159858 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-17 [patent_title] => 'Signal margin improvement for read operations in a cross-point memory array' [patent_app_type] => utility [patent_app_number] => 12/653860 [patent_app_country] => US [patent_app_date] => 2009-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 7520 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/159/08159858.pdf [firstpage_image] =>[orig_patent_app_number] => 12653860 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/653860
Signal margin improvement for read operations in a cross-point memory array Dec 17, 2009 Issued
Array ( [id] => 8573214 [patent_doc_number] => 08339867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-25 [patent_title] => 'Fuse elements based on two-terminal re-writeable non-volatile memory' [patent_app_type] => utility [patent_app_number] => 12/653850 [patent_app_country] => US [patent_app_date] => 2009-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 7641 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12653850 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/653850
Fuse elements based on two-terminal re-writeable non-volatile memory Dec 17, 2009 Issued
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