Angelica M Mckinney
Examiner (ID: 15529, Phone: (571)270-3321 , Office: P/2653 )
Most Active Art Unit | 2653 |
Art Unit(s) | 2653, 2694 |
Total Applications | 528 |
Issued Applications | 405 |
Pending Applications | 54 |
Abandoned Applications | 69 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 9128685
[patent_doc_number] => 08576641
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-11-05
[patent_title] => 'Method of and circuit for providing non-volatile memory in an integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 12/714216
[patent_app_country] => US
[patent_app_date] => 2010-02-26
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12714216
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/714216 | Method of and circuit for providing non-volatile memory in an integrated circuit | Feb 25, 2010 | Issued |
Array
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[patent_doc_number] => 20110211398
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-09-01
[patent_title] => 'MEMORY DEVICE AND ASSOCIATED MAIN WORD LINE AND WORD LINE DRIVING CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 12/713708
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[pdf_file] => publications/A1/0211/20110211398.pdf
[firstpage_image] =>[orig_patent_app_number] => 12713708
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/713708 | Memory device and associated main word line and word line driving circuit | Feb 25, 2010 | Issued |
Array
(
[id] => 5934688
[patent_doc_number] => 20110211401
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-09-01
[patent_title] => 'GLOBAL BIT SELECT CIRCUIT INTERFACE WITH SIMPLIFIED WRITE BIT LINE PRECHARGING'
[patent_app_type] => utility
[patent_app_number] => 12/713670
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/713670 | Global bit select circuit interface with simplified write bit line precharging | Feb 25, 2010 | Issued |
Array
(
[id] => 6201123
[patent_doc_number] => 20110063909
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-03-17
[patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY AND METHOD OF TESTING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/713674
[patent_app_country] => US
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Array
(
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[patent_doc_number] => 08325543
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[patent_issue_date] => 2012-12-04
[patent_title] => 'Global bit select circuit interface with false write through blocking'
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Array
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[patent_kind] => A1
[patent_issue_date] => 2010-09-23
[patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICES AND VOLTAGE CONTROL CIRCUIT'
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Array
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[patent_doc_number] => 20100232213
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[patent_issue_date] => 2010-09-16
[patent_title] => 'CONTROL SIGNAL TRANSMITTING SYSTEM OF A SEMICONDUCTOR DEVICE'
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[patent_app_number] => 12/711586
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/711586 | CONTROL SIGNAL TRANSMITTING SYSTEM OF A SEMICONDUCTOR DEVICE | Feb 23, 2010 | Abandoned |
Array
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[id] => 6520312
[patent_doc_number] => 20100220526
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-02
[patent_title] => 'NONVOLATILE MEMORY DEVICE, SYSTEM, AND PROGRAMMING METHOD'
[patent_app_type] => utility
[patent_app_number] => 12/711450
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/711450 | Nonvolatile memory device, system, and programming method | Feb 23, 2010 | Issued |
Array
(
[id] => 6044789
[patent_doc_number] => 20110205793
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-08-25
[patent_title] => 'METHOD FOR ACCESSING MULTI-LEVEL NON-VOLATILE MEMORY CELL'
[patent_app_type] => utility
[patent_app_number] => 12/712184
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/712184 | METHOD FOR ACCESSING MULTI-LEVEL NON-VOLATILE MEMORY CELL | Feb 23, 2010 | Abandoned |
Array
(
[id] => 6044861
[patent_doc_number] => 20110205828
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-08-25
[patent_title] => 'SEMICONDUCTOR MEMORY WITH MEMORY CELL PORTIONS HAVING DIFFERENT ACCESS SPEEDS'
[patent_app_type] => utility
[patent_app_number] => 12/710800
[patent_app_country] => US
[patent_app_date] => 2010-02-23
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 12710800
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/710800 | Semiconductor memory with memory cell portions having different access speeds | Feb 22, 2010 | Issued |
Array
(
[id] => 6483825
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[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-08-19
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE PROVIDED WITH RESISTANCE CHANGE ELEMENT'
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[patent_app_number] => 12/709256
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/709256 | SEMICONDUCTOR MEMORY DEVICE PROVIDED WITH RESISTANCE CHANGE ELEMENT | Feb 18, 2010 | Abandoned |
Array
(
[id] => 9287706
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[patent_kind] => B2
[patent_issue_date] => 2014-02-04
[patent_title] => 'Non-volatile memory devices including vertical NAND channels and methods of forming the same'
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Array
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[patent_title] => 'NONVOLATILE MEMORY DEVICE AND METHOD OF VERIFYING THE SAME'
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Array
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Array
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Array
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Array
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Array
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