Search

Angelica M Mckinney

Examiner (ID: 15529, Phone: (571)270-3321 , Office: P/2653 )

Most Active Art Unit
2653
Art Unit(s)
2653, 2694
Total Applications
528
Issued Applications
405
Pending Applications
54
Abandoned Applications
69

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17431474 [patent_doc_number] => 20220059183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => METHOD AND DEVICE FOR FAIL BIT REPAIRING [patent_app_type] => utility [patent_app_number] => 17/464886 [patent_app_country] => US [patent_app_date] => 2021-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15905 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17464886 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/464886
Method and device for fail bit repairing Sep 1, 2021 Issued
Array ( [id] => 19459937 [patent_doc_number] => 12100438 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-24 [patent_title] => Methods, devices and systems for an improved management of a non-volatile memory [patent_app_type] => utility [patent_app_number] => 17/404487 [patent_app_country] => US [patent_app_date] => 2021-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 10864 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17404487 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/404487
Methods, devices and systems for an improved management of a non-volatile memory Aug 16, 2021 Issued
Array ( [id] => 18464193 [patent_doc_number] => 11688486 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-27 [patent_title] => Retention voltage management for a volatile memory [patent_app_type] => utility [patent_app_number] => 17/402915 [patent_app_country] => US [patent_app_date] => 2021-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9796 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17402915 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/402915
Retention voltage management for a volatile memory Aug 15, 2021 Issued
Array ( [id] => 18182362 [patent_doc_number] => 20230043091 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => PERFORMING REFRESH OPERATIONS OF A MEMORY DEVICE ACCORDING TO A DYNAMIC REFRESH FREQUENCY [patent_app_type] => utility [patent_app_number] => 17/393020 [patent_app_country] => US [patent_app_date] => 2021-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8967 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17393020 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/393020
Performing refresh operations of a memory device according to a dynamic refresh frequency Aug 2, 2021 Issued
Array ( [id] => 18331636 [patent_doc_number] => 11636886 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-25 [patent_title] => Memory devices with user-defined tagging mechanism [patent_app_type] => utility [patent_app_number] => 17/392924 [patent_app_country] => US [patent_app_date] => 2021-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6589 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17392924 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/392924
Memory devices with user-defined tagging mechanism Aug 2, 2021 Issued
Array ( [id] => 17231999 [patent_doc_number] => 20210358556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => CHARGE LOSS COMPENSATION [patent_app_type] => utility [patent_app_number] => 17/390142 [patent_app_country] => US [patent_app_date] => 2021-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15547 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17390142 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/390142
Charge loss compensation Jul 29, 2021 Issued
Array ( [id] => 18431422 [patent_doc_number] => 11676649 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-13 [patent_title] => Sense timing coordination for memory [patent_app_type] => utility [patent_app_number] => 17/383090 [patent_app_country] => US [patent_app_date] => 2021-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 21638 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17383090 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/383090
Sense timing coordination for memory Jul 21, 2021 Issued
Array ( [id] => 18431454 [patent_doc_number] => 11676681 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-13 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/382923 [patent_app_country] => US [patent_app_date] => 2021-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 11979 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17382923 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/382923
Semiconductor device Jul 21, 2021 Issued
Array ( [id] => 17217503 [patent_doc_number] => 20210350841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => MEMORY UNIT [patent_app_type] => utility [patent_app_number] => 17/382510 [patent_app_country] => US [patent_app_date] => 2021-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7994 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17382510 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/382510
Memory unit Jul 21, 2021 Issued
Array ( [id] => 19494104 [patent_doc_number] => 12112825 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-08 [patent_title] => Sense amplifier, memory, and control method [patent_app_type] => utility [patent_app_number] => 17/655323 [patent_app_country] => US [patent_app_date] => 2021-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 7952 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17655323 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/655323
Sense amplifier, memory, and control method Jul 20, 2021 Issued
Array ( [id] => 17217504 [patent_doc_number] => 20210350842 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => REFRESH OPERATION IN MULTI-DIE MEMORY [patent_app_type] => utility [patent_app_number] => 17/379422 [patent_app_country] => US [patent_app_date] => 2021-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6975 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17379422 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/379422
Refresh operation in multi-die memory Jul 18, 2021 Issued
Array ( [id] => 18415816 [patent_doc_number] => 11670361 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Sequential delay enabler timer circuit for low voltage operation for SRAMs [patent_app_type] => utility [patent_app_number] => 17/377080 [patent_app_country] => US [patent_app_date] => 2021-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11794 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17377080 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/377080
Sequential delay enabler timer circuit for low voltage operation for SRAMs Jul 14, 2021 Issued
Array ( [id] => 17507355 [patent_doc_number] => 20220100458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => DIGITAL SIGNAL PROCESSING DEVICE AND CONTROL METHOD OF DIGITAL SIGNAL PROCESSING DEVICE [patent_app_type] => utility [patent_app_number] => 17/375526 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7854 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375526 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/375526
Digital signal processing device and control method of digital signal processing device Jul 13, 2021 Issued
Array ( [id] => 18520625 [patent_doc_number] => 11710519 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => High density memory with reference memory using grouped cells and corresponding operations [patent_app_type] => utility [patent_app_number] => 17/368705 [patent_app_country] => US [patent_app_date] => 2021-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 30 [patent_no_of_words] => 12840 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17368705 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/368705
High density memory with reference memory using grouped cells and corresponding operations Jul 5, 2021 Issued
Array ( [id] => 18097040 [patent_doc_number] => 20220415381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => APPARATUS FOR DIFFERENTIAL MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 17/362280 [patent_app_country] => US [patent_app_date] => 2021-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14607 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17362280 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/362280
Apparatus for differential memory cells Jun 28, 2021 Issued
Array ( [id] => 18578710 [patent_doc_number] => 11735249 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-22 [patent_title] => Sensing techniques for differential memory cells [patent_app_type] => utility [patent_app_number] => 17/362306 [patent_app_country] => US [patent_app_date] => 2021-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 19443 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17362306 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/362306
Sensing techniques for differential memory cells Jun 28, 2021 Issued
Array ( [id] => 17158786 [patent_doc_number] => 20210319837 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-14 [patent_title] => Read Level Tracking and Optimization [patent_app_type] => utility [patent_app_number] => 17/359352 [patent_app_country] => US [patent_app_date] => 2021-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12440 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17359352 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/359352
Read level tracking and optimization Jun 24, 2021 Issued
Array ( [id] => 17536446 [patent_doc_number] => 20220115055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => NONVOLATILE MEMORY APPARATUS FOR GENERATING READ REFERENCE AND AN OPERATING METHOD OF THE NONVOLATILE MEMORY APPARATUS [patent_app_type] => utility [patent_app_number] => 17/353361 [patent_app_country] => US [patent_app_date] => 2021-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9598 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17353361 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/353361
Nonvolatile memory apparatus for generating read reference and an operating method of the nonvolatile memory apparatus Jun 20, 2021 Issued
Array ( [id] => 18735521 [patent_doc_number] => 11804262 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-31 [patent_title] => Area efficient memory cell read disturb mitigation [patent_app_type] => utility [patent_app_number] => 17/350973 [patent_app_country] => US [patent_app_date] => 2021-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12933 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17350973 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/350973
Area efficient memory cell read disturb mitigation Jun 16, 2021 Issued
Array ( [id] => 18080752 [patent_doc_number] => 20220406364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => Hetero-Plane Data Storage Structures For Non-Volatile Memory [patent_app_type] => utility [patent_app_number] => 17/349040 [patent_app_country] => US [patent_app_date] => 2021-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14976 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17349040 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/349040
Hetero-plane data storage structures for non-volatile memory Jun 15, 2021 Issued
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