Search

Anh D. Mai

Examiner (ID: 6717)

Most Active Art Unit
2814
Art Unit(s)
2814, 2889, 2829, 2893
Total Applications
1241
Issued Applications
570
Pending Applications
112
Abandoned Applications
585

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20037978 [patent_doc_number] => 20250176200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => Semiconductor Structure and Manufacturing Method Thereof [patent_app_type] => utility [patent_app_number] => 18/952927 [patent_app_country] => US [patent_app_date] => 2024-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5640 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18952927 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/952927
Semiconductor Structure and Manufacturing Method Thereof Nov 18, 2024 Pending
Array ( [id] => 19589836 [patent_doc_number] => 20240387393 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => Method for Forming a Semiconductor Device Having TSV Formed Through a Silicon Interposer and a Second Silicon Substrate with Cavity Covering a Second Die [patent_app_type] => utility [patent_app_number] => 18/786966 [patent_app_country] => US [patent_app_date] => 2024-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3663 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18786966 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/786966
Method for Forming a Semiconductor Device Having TSV Formed Through a Silicon Interposer and a Second Silicon Substrate with Cavity Covering a Second Die Jul 28, 2024 Pending
Array ( [id] => 19577488 [patent_doc_number] => 20240381780 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => METHOD FOR FORMING A PERPENDICULAR SPIN TORQUE OSCILLATOR (PSTO) INCLUDING FORMING A MAGNETO RESISTIVE SENSOR (MR) OVER A SPIN TORQUE OSCILLATOR (STO) [patent_app_type] => utility [patent_app_number] => 18/782714 [patent_app_country] => US [patent_app_date] => 2024-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11659 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18782714 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/782714
METHOD FOR FORMING A PERPENDICULAR SPIN TORQUE OSCILLATOR (PSTO) INCLUDING FORMING A MAGNETO RESISTIVE SENSOR (MR) OVER A SPIN TORQUE OSCILLATOR (STO) Jul 23, 2024 Pending
Array ( [id] => 19548554 [patent_doc_number] => 20240365590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => ORGANIC LIGHT-EMITTING DIODE DISPLAY [patent_app_type] => utility [patent_app_number] => 18/768308 [patent_app_country] => US [patent_app_date] => 2024-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12630 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18768308 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/768308
ORGANIC LIGHT-EMITTING DIODE DISPLAY Jul 9, 2024 Pending
Array ( [id] => 19500520 [patent_doc_number] => 20240339538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => GATE-ALL-AROUND FIELD EFFECT TRANSISTORS WITH INNER SPACERS AND METHODS [patent_app_type] => utility [patent_app_number] => 18/749813 [patent_app_country] => US [patent_app_date] => 2024-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11474 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18749813 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/749813
GATE-ALL-AROUND FIELD EFFECT TRANSISTORS WITH INNER SPACERS AND METHODS Jun 20, 2024 Pending
Array ( [id] => 20125992 [patent_doc_number] => 20250241023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => Manufacturing Method for a Power MOSFET with a p-n-p-n-p Gate-Source ESD Diode Structure Formed Over A Breakdown Voltage Enhancement and Leakage Prevention Structure Comprising a Reduced Surface Field (RESURF) Structure and a Body Ring Structure [patent_app_type] => utility [patent_app_number] => 18/737883 [patent_app_country] => US [patent_app_date] => 2024-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4241 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18737883 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/737883
Manufacturing Method for a Power MOSFET with a p-n-p-n-p Gate-Source ESD Diode Structure Formed Over A Breakdown Voltage Enhancement and Leakage Prevention Structure Comprising a Reduced Surface Field (RESURF) Structure and a Body Ring Structure Jun 6, 2024 Pending
Array ( [id] => 19364399 [patent_doc_number] => 20240266433 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => SEMICONDUCTOR DEVICE HAVING DEVICE ELEMENT STRUCTURES WITH PN JUNCTION FORMED IN ACTIVE REGION AND VOLTAGE WITHSTANDING RINGS FORMED IN PERIPHERY REGION SURROUNDING THE ACTIVE REGION AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/610017 [patent_app_country] => US [patent_app_date] => 2024-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17355 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 587 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18610017 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/610017
SEMICONDUCTOR DEVICE HAVING DEVICE ELEMENT STRUCTURES WITH PN JUNCTION FORMED IN ACTIVE REGION AND VOLTAGE WITHSTANDING RINGS FORMED IN PERIPHERY REGION SURROUNDING THE ACTIVE REGION AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Mar 18, 2024 Pending
Array ( [id] => 19288004 [patent_doc_number] => 20240224487 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => Semiconductor Devices Including FINFET Structures with Increased Gate Surface [patent_app_type] => utility [patent_app_number] => 18/604195 [patent_app_country] => US [patent_app_date] => 2024-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14314 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 482 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18604195 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/604195
Semiconductor Devices Including FINFET Structures with Increased Gate Surface Mar 12, 2024 Pending
Array ( [id] => 19253044 [patent_doc_number] => 20240204041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/593833 [patent_app_country] => US [patent_app_date] => 2024-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7285 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18593833 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/593833
SEMICONDUCTOR DEVICE Feb 29, 2024 Pending
Array ( [id] => 19193521 [patent_doc_number] => 20240172434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => SEMICONDUCTOR DEVICE HAVING STACKS ASIDE STACKED GATE STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/429264 [patent_app_country] => US [patent_app_date] => 2024-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4699 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18429264 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/429264
Semiconductor device having non-continuous wall structure surrounding a stacked gate structure including a conductive layer disposed between segmented portions of the wall structure Jan 30, 2024 Issued
Array ( [id] => 19191645 [patent_doc_number] => 20240170558 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => SEMICONDUCTOR DEVICE HAVING A PROTRUSION PROJECTION FORMED UNDER A GATE ELECTRODE AND BETWEEN BODY REGIONS [patent_app_type] => utility [patent_app_number] => 18/420823 [patent_app_country] => US [patent_app_date] => 2024-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15819 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18420823 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/420823
SEMICONDUCTOR DEVICE HAVING A PROTRUSION PROJECTION FORMED UNDER A GATE ELECTRODE AND BETWEEN BODY REGIONS Jan 23, 2024 Pending
Array ( [id] => 19873741 [patent_doc_number] => 12266612 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => Method for forming a semiconductor device including forming a first interconnect structure on one side of a substrate having first metal feature closer the substrate than second metal feature and forming first and second tsv on other side of substrate connecting to the metal features [patent_app_type] => utility [patent_app_number] => 18/525966 [patent_app_country] => US [patent_app_date] => 2023-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 3612 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18525966 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/525966
Method for forming a semiconductor device including forming a first interconnect structure on one side of a substrate having first metal feature closer the substrate than second metal feature and forming first and second tsv on other side of substrate connecting to the metal features Nov 30, 2023 Issued
Array ( [id] => 18961212 [patent_doc_number] => 20240049539 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => DISPLAY SUBSTRATE, METHOD FOR FABRICATING THE SAME, AND DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 18/490147 [patent_app_country] => US [patent_app_date] => 2023-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6054 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18490147 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/490147
DISPLAY SUBSTRATE, METHOD FOR FABRICATING THE SAME, AND DISPLAY PANEL Oct 18, 2023 Abandoned
Array ( [id] => 18883107 [patent_doc_number] => 20240006476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => SEMICONDUCTOR DEVICE COMPRISING A MOSFET HAVING A RESURF REGION AND HIGHER PEAK IMPURITY CONCENTRATION DIFFUSION REGION IN THE RESURF REGION [patent_app_type] => utility [patent_app_number] => 18/465423 [patent_app_country] => US [patent_app_date] => 2023-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7815 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18465423 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/465423
SEMICONDUCTOR DEVICE COMPRISING A MOSFET HAVING A RESURF REGION AND HIGHER PEAK IMPURITY CONCENTRATION DIFFUSION REGION IN THE RESURF REGION Sep 11, 2023 Pending
Array ( [id] => 19305945 [patent_doc_number] => 20240234525 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2024-07-11 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/234596 [patent_app_country] => US [patent_app_date] => 2023-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12028 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18234596 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/234596
SEMICONDUCTOR DEVICE Aug 15, 2023 Pending
Array ( [id] => 19305945 [patent_doc_number] => 20240234525 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2024-07-11 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/234596 [patent_app_country] => US [patent_app_date] => 2023-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12028 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18234596 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/234596
SEMICONDUCTOR DEVICE Aug 14, 2023 Pending
Array ( [id] => 18812981 [patent_doc_number] => 20230387318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/233456 [patent_app_country] => US [patent_app_date] => 2023-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14697 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18233456 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/233456
SEMICONDUCTOR DEVICE Aug 13, 2023 Pending
Array ( [id] => 18833788 [patent_doc_number] => 20230402315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => DOUBLE PATTERNING TECHNIQUES FOR FORMING A DEEP TRENCH ISOLATION STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/447547 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15590 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447547 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/447547
Techniques for forming a deep trench isolation structure between photodiodes by forming a first set of trenches based on a first pattern and forming a second set of trenches based on a second pattern Aug 9, 2023 Issued
Array ( [id] => 18812815 [patent_doc_number] => 20230387152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => PIXEL SENSOR INCLUDING A TRANSFER FINFET [patent_app_type] => utility [patent_app_number] => 18/447340 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12737 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447340 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/447340
PIXEL SENSOR INCLUDING A TRANSFER FINFET Aug 9, 2023 Pending
Array ( [id] => 18812857 [patent_doc_number] => 20230387194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/446919 [patent_app_country] => US [patent_app_date] => 2023-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10025 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18446919 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/446919
FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURING THE SAME Aug 8, 2023 Pending
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