Search

Anh Q. Tran

Examiner (ID: 16073, Phone: (571)272-1813 , Office: P/2844 )

Most Active Art Unit
2819
Art Unit(s)
2844, 2819
Total Applications
2860
Issued Applications
2628
Pending Applications
89
Abandoned Applications
176

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19306977 [patent_doc_number] => 20240235557 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => DIGITALLY CONTROLLED UNIFIED RECEIVER FOR MULTI-RANK SYSTEM [patent_app_type] => utility [patent_app_number] => 18/614490 [patent_app_country] => US [patent_app_date] => 2024-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10471 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18614490 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/614490
DIGITALLY CONTROLLED UNIFIED RECEIVER FOR MULTI-RANK SYSTEM Mar 21, 2024 Abandoned
Array ( [id] => 19306977 [patent_doc_number] => 20240235557 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => DIGITALLY CONTROLLED UNIFIED RECEIVER FOR MULTI-RANK SYSTEM [patent_app_type] => utility [patent_app_number] => 18/614490 [patent_app_country] => US [patent_app_date] => 2024-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10471 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18614490 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/614490
DIGITALLY CONTROLLED UNIFIED RECEIVER FOR MULTI-RANK SYSTEM Mar 21, 2024 Abandoned
Array ( [id] => 20251792 [patent_doc_number] => 20250300661 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-25 [patent_title] => DUAL LAYER LOGIC FOR PERFORMANCE OPTIMIZATION [patent_app_type] => utility [patent_app_number] => 18/609163 [patent_app_country] => US [patent_app_date] => 2024-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1172 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18609163 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/609163
DUAL LAYER LOGIC FOR PERFORMANCE OPTIMIZATION Mar 18, 2024 Pending
Array ( [id] => 20251792 [patent_doc_number] => 20250300661 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-25 [patent_title] => DUAL LAYER LOGIC FOR PERFORMANCE OPTIMIZATION [patent_app_type] => utility [patent_app_number] => 18/609163 [patent_app_country] => US [patent_app_date] => 2024-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1172 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18609163 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/609163
DUAL LAYER LOGIC FOR PERFORMANCE OPTIMIZATION Mar 18, 2024 Pending
Array ( [id] => 19286680 [patent_doc_number] => 20240223160 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => APPARATUSES AND METHODS FOR CALIBRATING ADJUSTABLE IMPEDANCES OF A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/607063 [patent_app_country] => US [patent_app_date] => 2024-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10667 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18607063 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/607063
Apparatuses and methods for calibrating adjustable impedances of a semiconductor device Mar 14, 2024 Issued
Array ( [id] => 19283258 [patent_doc_number] => 20240219734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => EXTERNAL ILLUMINATION WITH REDUCED DETECTABILITY [patent_app_type] => utility [patent_app_number] => 18/603546 [patent_app_country] => US [patent_app_date] => 2024-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11107 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18603546 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/603546
External illumination with reduced detectability Mar 12, 2024 Issued
Array ( [id] => 20191082 [patent_doc_number] => 12402220 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-26 [patent_title] => Data acquisition methods and apparatus for a network connected LED driver [patent_app_type] => utility [patent_app_number] => 18/603633 [patent_app_country] => US [patent_app_date] => 2024-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3240 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18603633 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/603633
Data acquisition methods and apparatus for a network connected LED driver Mar 12, 2024 Issued
Array ( [id] => 19612044 [patent_doc_number] => 12160938 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-03 [patent_title] => Hybrid light emitting diode tube with power select switch [patent_app_type] => utility [patent_app_number] => 18/601281 [patent_app_country] => US [patent_app_date] => 2024-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 13186 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18601281 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/601281
Hybrid light emitting diode tube with power select switch Mar 10, 2024 Issued
Array ( [id] => 19434594 [patent_doc_number] => 20240303092 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => ASYNCHRONOUS STATE MACHINE FOR A SWITCHING CONVERTER [patent_app_type] => utility [patent_app_number] => 18/597564 [patent_app_country] => US [patent_app_date] => 2024-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9996 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18597564 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/597564
Asynchronous state machine for a switching converter Mar 5, 2024 Issued
Array ( [id] => 19434594 [patent_doc_number] => 20240303092 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => ASYNCHRONOUS STATE MACHINE FOR A SWITCHING CONVERTER [patent_app_type] => utility [patent_app_number] => 18/597564 [patent_app_country] => US [patent_app_date] => 2024-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9996 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18597564 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/597564
Asynchronous state machine for a switching converter Mar 5, 2024 Issued
Array ( [id] => 19434594 [patent_doc_number] => 20240303092 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => ASYNCHRONOUS STATE MACHINE FOR A SWITCHING CONVERTER [patent_app_type] => utility [patent_app_number] => 18/597564 [patent_app_country] => US [patent_app_date] => 2024-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9996 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18597564 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/597564
Asynchronous state machine for a switching converter Mar 5, 2024 Issued
Array ( [id] => 19453646 [patent_doc_number] => 20240313776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => SEMICONDUCTOR DEVICE, SEMICONDUCTOR SYSTEM, AND METHOD OF CONTROLLING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/594589 [patent_app_country] => US [patent_app_date] => 2024-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15835 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18594589 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/594589
SEMICONDUCTOR DEVICE, SEMICONDUCTOR SYSTEM, AND METHOD OF CONTROLLING SEMICONDUCTOR DEVICE Mar 3, 2024 Pending
Array ( [id] => 19453646 [patent_doc_number] => 20240313776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => SEMICONDUCTOR DEVICE, SEMICONDUCTOR SYSTEM, AND METHOD OF CONTROLLING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/594589 [patent_app_country] => US [patent_app_date] => 2024-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15835 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18594589 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/594589
SEMICONDUCTOR DEVICE, SEMICONDUCTOR SYSTEM, AND METHOD OF CONTROLLING SEMICONDUCTOR DEVICE Mar 3, 2024 Pending
Array ( [id] => 19391822 [patent_doc_number] => 20240281692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => TEMPORAL AND SFQ PULSE STREAM ENCODING FOR AREA EFFICIENT SUPERCONDUCTING ACCELERATORS [patent_app_type] => utility [patent_app_number] => 18/583530 [patent_app_country] => US [patent_app_date] => 2024-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9761 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18583530 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/583530
TEMPORAL AND SFQ PULSE STREAM ENCODING FOR AREA EFFICIENT SUPERCONDUCTING ACCELERATORS Feb 20, 2024 Pending
Array ( [id] => 20183086 [patent_doc_number] => 20250267044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-21 [patent_title] => VOLTAGE MODE DRIVER FOR HIGH-PERFORMANCE AND LOW-POWER CO-EXISTENCE [patent_app_type] => utility [patent_app_number] => 18/444027 [patent_app_country] => US [patent_app_date] => 2024-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9956 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18444027 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/444027
VOLTAGE MODE DRIVER FOR HIGH-PERFORMANCE AND LOW-POWER CO-EXISTENCE Feb 15, 2024 Pending
Array ( [id] => 19980733 [patent_doc_number] => 12348224 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => Programmable logic block with multiple types of programmable arrays and flexible clock selection [patent_app_type] => utility [patent_app_number] => 18/435913 [patent_app_country] => US [patent_app_date] => 2024-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 2307 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18435913 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/435913
Programmable logic block with multiple types of programmable arrays and flexible clock selection Feb 6, 2024 Issued
Array ( [id] => 19161898 [patent_doc_number] => 20240154605 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => APPARATUSES AND METHODS FOR CALIBRATING ADJUSTABLE IMPEDANCES OF A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/419948 [patent_app_country] => US [patent_app_date] => 2024-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10637 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18419948 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/419948
Apparatuses and methods for calibrating adjustable impedances of a semiconductor device Jan 22, 2024 Issued
Array ( [id] => 19178015 [patent_doc_number] => 20240163989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => Human-Centric Lighting Control [patent_app_type] => utility [patent_app_number] => 18/418823 [patent_app_country] => US [patent_app_date] => 2024-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 31154 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18418823 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/418823
Human-centric lighting control Jan 21, 2024 Issued
Array ( [id] => 19178015 [patent_doc_number] => 20240163989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => Human-Centric Lighting Control [patent_app_type] => utility [patent_app_number] => 18/418823 [patent_app_country] => US [patent_app_date] => 2024-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 31154 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18418823 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/418823
Human-centric lighting control Jan 21, 2024 Issued
Array ( [id] => 20009910 [patent_doc_number] => 20250148132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => VOLTAGE MODE WEAK-PUF CIRCUIT WITH RICH CHALLENGE-RESPONSE PAIRS [patent_app_type] => utility [patent_app_number] => 18/418350 [patent_app_country] => US [patent_app_date] => 2024-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7671 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 894 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18418350 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/418350
Voltage mode weak-PUF circuit with rich challenge-response pairs Jan 21, 2024 Issued
Menu