Search

Annette H. Para

Examiner (ID: 6185, Phone: (571)272-0982 , Office: P/1661 )

Most Active Art Unit
1661
Art Unit(s)
1649, 1661
Total Applications
4842
Issued Applications
4661
Pending Applications
3
Abandoned Applications
178

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2889097 [patent_doc_number] => 05119334 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-02 [patent_title] => 'Dynamic random access memory having improved word line control' [patent_app_type] => 1 [patent_app_number] => 7/493395 [patent_app_country] => US [patent_app_date] => 1990-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5689 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/119/05119334.pdf [firstpage_image] =>[orig_patent_app_number] => 493395 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/493395
Dynamic random access memory having improved word line control Mar 13, 1990 Issued
07/492455 DYNAMIC-TYPE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF DRIVING THE SAME Mar 12, 1990 Abandoned
Array ( [id] => 2800760 [patent_doc_number] => 05136540 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-08-04 [patent_title] => 'Non-volatile semiconductor memory for volatiley and non-volatiley storing information and writing method thereof' [patent_app_type] => 1 [patent_app_number] => 7/491945 [patent_app_country] => US [patent_app_date] => 1990-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 4736 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/136/05136540.pdf [firstpage_image] =>[orig_patent_app_number] => 491945 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/491945
Non-volatile semiconductor memory for volatiley and non-volatiley storing information and writing method thereof Mar 11, 1990 Issued
Array ( [id] => 2928258 [patent_doc_number] => 05193075 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-03-09 [patent_title] => 'Static memory containing sense AMP and sense AMP switching circuit' [patent_app_type] => 1 [patent_app_number] => 7/490745 [patent_app_country] => US [patent_app_date] => 1990-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 8575 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/193/05193075.pdf [firstpage_image] =>[orig_patent_app_number] => 490745 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/490745
Static memory containing sense AMP and sense AMP switching circuit Mar 7, 1990 Issued
07/486405 SEMICONDUCTOR MEMORY DEVICE FOR PARALLEL WRITE TEST PERFORMANCE AND A METHOD THEREOF Feb 27, 1990 Abandoned
Array ( [id] => 3102724 [patent_doc_number] => 05278961 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-11 [patent_title] => 'Physical address to logical address translator for memory management units' [patent_app_type] => 1 [patent_app_number] => 7/483153 [patent_app_country] => US [patent_app_date] => 1990-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7192 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/278/05278961.pdf [firstpage_image] =>[orig_patent_app_number] => 483153 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/483153
Physical address to logical address translator for memory management units Feb 21, 1990 Issued
Array ( [id] => 2937783 [patent_doc_number] => 05187686 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-02-16 [patent_title] => 'Control circuit having outputs with differing rise and fall times' [patent_app_type] => 1 [patent_app_number] => 7/479865 [patent_app_country] => US [patent_app_date] => 1990-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 6114 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/187/05187686.pdf [firstpage_image] =>[orig_patent_app_number] => 479865 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/479865
Control circuit having outputs with differing rise and fall times Feb 13, 1990 Issued
07/479428 MULTIPROCESSING SYSTEM HAVING A SINGLE TRANSLATION LOOKASIDE BUFFER WITH REDUCED PROCESSOR OVERHEAD Feb 11, 1990 Abandoned
07/477384 BIT ADDRESSING SYSTEM Feb 8, 1990 Abandoned
07/479495 FERROELECTRIC MEMORY STRUCTURE Feb 8, 1990 Abandoned
07/476715 METHOD FOR PROGRAMMING PROGRAMMABLE ELEMENTS IN PROGRAMMABLE DEVICES Feb 7, 1990 Abandoned
Array ( [id] => 2861688 [patent_doc_number] => 05089987 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-02-18 [patent_title] => 'Refresh control circuit' [patent_app_type] => 1 [patent_app_number] => 7/475665 [patent_app_country] => US [patent_app_date] => 1990-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 1844 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/089/05089987.pdf [firstpage_image] =>[orig_patent_app_number] => 475665 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/475665
Refresh control circuit Feb 5, 1990 Issued
Array ( [id] => 2929830 [patent_doc_number] => 05193160 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-03-09 [patent_title] => 'Address translation system with register storing section and area numbers' [patent_app_type] => 1 [patent_app_number] => 7/474261 [patent_app_country] => US [patent_app_date] => 1990-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5235 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/193/05193160.pdf [firstpage_image] =>[orig_patent_app_number] => 474261 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/474261
Address translation system with register storing section and area numbers Feb 4, 1990 Issued
Array ( [id] => 2692100 [patent_doc_number] => 05046047 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-03 [patent_title] => 'Circuit arrangement for verifying data stored in a random access memory' [patent_app_type] => 1 [patent_app_number] => 7/473665 [patent_app_country] => US [patent_app_date] => 1990-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1187 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/046/05046047.pdf [firstpage_image] =>[orig_patent_app_number] => 473665 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/473665
Circuit arrangement for verifying data stored in a random access memory Feb 1, 1990 Issued
Array ( [id] => 2679987 [patent_doc_number] => 05034918 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-23 [patent_title] => 'Adaptive associative memory comprising synapes of CMOS transistors' [patent_app_type] => 1 [patent_app_number] => 7/473465 [patent_app_country] => US [patent_app_date] => 1990-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2758 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 519 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/034/05034918.pdf [firstpage_image] =>[orig_patent_app_number] => 473465 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/473465
Adaptive associative memory comprising synapes of CMOS transistors Jan 31, 1990 Issued
Array ( [id] => 2904964 [patent_doc_number] => 05210841 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-05-11 [patent_title] => 'External memory accessing system' [patent_app_type] => 1 [patent_app_number] => 7/472099 [patent_app_country] => US [patent_app_date] => 1990-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3184 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/210/05210841.pdf [firstpage_image] =>[orig_patent_app_number] => 472099 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/472099
External memory accessing system Jan 29, 1990 Issued
Array ( [id] => 2905272 [patent_doc_number] => 05184322 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-02-02 [patent_title] => 'Optical storage device with a stationary mass storage medium' [patent_app_type] => 1 [patent_app_number] => 7/471765 [patent_app_country] => US [patent_app_date] => 1990-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2756 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/184/05184322.pdf [firstpage_image] =>[orig_patent_app_number] => 471765 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/471765
Optical storage device with a stationary mass storage medium Jan 28, 1990 Issued
Array ( [id] => 2947888 [patent_doc_number] => 05247628 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-09-21 [patent_title] => 'Parallel processor instruction dispatch apparatus with interrupt handler' [patent_app_type] => 1 [patent_app_number] => 7/467315 [patent_app_country] => US [patent_app_date] => 1990-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 4068 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/247/05247628.pdf [firstpage_image] =>[orig_patent_app_number] => 467315 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/467315
Parallel processor instruction dispatch apparatus with interrupt handler Jan 16, 1990 Issued
Array ( [id] => 2703192 [patent_doc_number] => 05020025 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-28 [patent_title] => 'Capacitively coupled read-only memory' [patent_app_type] => 1 [patent_app_number] => 7/462625 [patent_app_country] => US [patent_app_date] => 1990-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3666 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/020/05020025.pdf [firstpage_image] =>[orig_patent_app_number] => 462625 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/462625
Capacitively coupled read-only memory Jan 8, 1990 Issued
07/461585 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING AN AREA RESPONSIVE TO TO WRITING ALLOWANCE SIGNAL Jan 4, 1990 Abandoned
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