Search

Anthan Tran

Examiner (ID: 7569, Phone: (571)272-8709 , Office: P/2825 )

Most Active Art Unit
2825
Art Unit(s)
2827, 2825
Total Applications
1111
Issued Applications
905
Pending Applications
82
Abandoned Applications
150

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19696085 [patent_doc_number] => 20250014630 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR MEMORY APPARATUS [patent_app_type] => utility [patent_app_number] => 18/898293 [patent_app_country] => US [patent_app_date] => 2024-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4879 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18898293 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/898293
SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR MEMORY APPARATUS Sep 25, 2024 Pending
Array ( [id] => 19661778 [patent_doc_number] => 20240428843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => HOST APPARATUS AND EXTENSION DEVICE [patent_app_type] => utility [patent_app_number] => 18/825362 [patent_app_country] => US [patent_app_date] => 2024-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16827 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18825362 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/825362
HOST APPARATUS AND EXTENSION DEVICE Sep 4, 2024 Pending
Array ( [id] => 20514449 [patent_doc_number] => 20260038551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-05 [patent_title] => MEMORY CIRCUITS WITH WORD LINE OVERDRIVE [patent_app_type] => utility [patent_app_number] => 18/795058 [patent_app_country] => US [patent_app_date] => 2024-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1200 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18795058 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/795058
MEMORY CIRCUITS WITH WORD LINE OVERDRIVE Aug 4, 2024 Pending
Array ( [id] => 19604434 [patent_doc_number] => 20240395314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => APPARATUSES AND METHODS FOR ADDRESS BASED MEMORY PERFORMANCE [patent_app_type] => utility [patent_app_number] => 18/793154 [patent_app_country] => US [patent_app_date] => 2024-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11583 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18793154 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/793154
APPARATUSES AND METHODS FOR ADDRESS BASED MEMORY PERFORMANCE Aug 1, 2024 Pending
Array ( [id] => 20514477 [patent_doc_number] => 20260038579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-05 [patent_title] => SENSE AMP BALANCING COMPONENT [patent_app_type] => utility [patent_app_number] => 18/788961 [patent_app_country] => US [patent_app_date] => 2024-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3742 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18788961 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/788961
SENSE AMP BALANCING COMPONENT Jul 29, 2024 Pending
Array ( [id] => 20501663 [patent_doc_number] => 20260031125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-29 [patent_title] => MEMORY DEVICE DISTURBANCE MITIGATION USING EXTRA PLATE [patent_app_type] => utility [patent_app_number] => 18/786963 [patent_app_country] => US [patent_app_date] => 2024-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5898 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18786963 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/786963
MEMORY DEVICE DISTURBANCE MITIGATION USING EXTRA PLATE Jul 28, 2024 Pending
Array ( [id] => 20487296 [patent_doc_number] => 20260023495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-22 [patent_title] => HIGHEST DATA STATE PROGRAM-VERIFY SKIP FOR PROGRAM PERFORMANCE IMPROVEMENT [patent_app_type] => utility [patent_app_number] => 18/776354 [patent_app_country] => US [patent_app_date] => 2024-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14419 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18776354 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/776354
HIGHEST DATA STATE PROGRAM-VERIFY SKIP FOR PROGRAM PERFORMANCE IMPROVEMENT Jul 17, 2024 Pending
Array ( [id] => 19726905 [patent_doc_number] => 20250029656 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => MEMORY DEVICE INCLUDING VARIABLE SERIAL RESISTIVE ELEMENT HAVING VOLTAGE DIVIDING EFFECT AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/774249 [patent_app_country] => US [patent_app_date] => 2024-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4164 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18774249 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/774249
MEMORY DEVICE INCLUDING VARIABLE SERIAL RESISTIVE ELEMENT HAVING VOLTAGE DIVIDING EFFECT AND OPERATING METHOD THEREOF Jul 15, 2024 Pending
Array ( [id] => 19726893 [patent_doc_number] => 20250029644 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => MAGNETIC MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/773949 [patent_app_country] => US [patent_app_date] => 2024-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6444 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18773949 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/773949
MAGNETIC MEMORY DEVICE Jul 15, 2024 Pending
Array ( [id] => 20475992 [patent_doc_number] => 20260018213 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-15 [patent_title] => MEMORY DEVICES, MEMORY SYSTEMS, AND OPERATION METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 18/773950 [patent_app_country] => US [patent_app_date] => 2024-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9232 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18773950 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/773950
MEMORY DEVICES, MEMORY SYSTEMS, AND OPERATION METHODS THEREOF Jul 15, 2024 Pending
Array ( [id] => 19546120 [patent_doc_number] => 20240363156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => DYNAMIC MEMORY WITH SUSTAINABLE STORAGE ARCHITECTURE AND CLEAN UP CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/770651 [patent_app_country] => US [patent_app_date] => 2024-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11658 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18770651 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/770651
DYNAMIC MEMORY WITH SUSTAINABLE STORAGE ARCHITECTURE AND CLEAN UP CIRCUIT Jul 11, 2024 Pending
Array ( [id] => 19546144 [patent_doc_number] => 20240363180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => PAGE BUFFER, SEMICONDUCTOR MEMORY HAVING THE SAME, AND OPERATING METHOD OF THE SEMICONDUCTOR MEMORY [patent_app_type] => utility [patent_app_number] => 18/768518 [patent_app_country] => US [patent_app_date] => 2024-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18632 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18768518 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/768518
PAGE BUFFER, SEMICONDUCTOR MEMORY HAVING THE SAME, AND OPERATING METHOD OF THE SEMICONDUCTOR MEMORY Jul 9, 2024 Pending
Array ( [id] => 19749189 [patent_doc_number] => 20250037754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-30 [patent_title] => SEMICONDUCTOR DEVICE HAVING ROW DECODER CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/749394 [patent_app_country] => US [patent_app_date] => 2024-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3560 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18749394 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/749394
SEMICONDUCTOR DEVICE HAVING ROW DECODER CIRCUIT Jun 19, 2024 Pending
Array ( [id] => 19803722 [patent_doc_number] => 20250069647 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => SEMICONDUCTOR DEVICE HAVING ARRAY CONTROL CIRCUIT CONTROLLING SENSE AMPLIFIERS [patent_app_type] => utility [patent_app_number] => 18/749464 [patent_app_country] => US [patent_app_date] => 2024-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4055 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18749464 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/749464
SEMICONDUCTOR DEVICE HAVING ARRAY CONTROL CIRCUIT CONTROLLING SENSE AMPLIFIERS Jun 19, 2024 Pending
Array ( [id] => 19879615 [patent_doc_number] => 20250111872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-03 [patent_title] => APPARATUSES AND METHODS REFRESH RATE REGISTER ADJUSTMENT BASED ON REFRESH QUEUE [patent_app_type] => utility [patent_app_number] => 18/747740 [patent_app_country] => US [patent_app_date] => 2024-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7403 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18747740 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/747740
APPARATUSES AND METHODS REFRESH RATE REGISTER ADJUSTMENT BASED ON REFRESH QUEUE Jun 18, 2024 Pending
Array ( [id] => 19893039 [patent_doc_number] => 20250118351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => APPARATUSES AND METHODS FOR SINGLE AND MULTI MEMORY CELL ARCHITECTURES [patent_app_type] => utility [patent_app_number] => 18/746226 [patent_app_country] => US [patent_app_date] => 2024-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12912 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18746226 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/746226
APPARATUSES AND METHODS FOR SINGLE AND MULTI MEMORY CELL ARCHITECTURES Jun 17, 2024 Pending
Array ( [id] => 19712363 [patent_doc_number] => 20250022505 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => LOCAL I/O READ CIRCUIT IN MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/743561 [patent_app_country] => US [patent_app_date] => 2024-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3932 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18743561 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/743561
LOCAL I/O READ CIRCUIT IN MEMORY SYSTEM Jun 13, 2024 Pending
Array ( [id] => 20088561 [patent_doc_number] => 20250218497 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => MEMORY CORE CIRCUIT HAVING CELL ON PERIPHERY (COP) STRUCTURE AND MEMORY DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/743925 [patent_app_country] => US [patent_app_date] => 2024-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11989 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18743925 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/743925
MEMORY CORE CIRCUIT HAVING CELL ON PERIPHERY (COP) STRUCTURE AND MEMORY DEVICE INCLUDING THE SAME Jun 13, 2024 Pending
Array ( [id] => 20396667 [patent_doc_number] => 20250372142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => FERROELECTRIC IN-MEMORY COMPUTING [patent_app_type] => utility [patent_app_number] => 18/731184 [patent_app_country] => US [patent_app_date] => 2024-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9242 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18731184 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/731184
FERROELECTRIC IN-MEMORY COMPUTING May 30, 2024 Pending
Array ( [id] => 19589376 [patent_doc_number] => 20240386933 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => ADJUSTING A SENSING VOLTAGE IN MEMORY [patent_app_type] => utility [patent_app_number] => 18/662313 [patent_app_country] => US [patent_app_date] => 2024-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7363 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18662313 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/662313
ADJUSTING A SENSING VOLTAGE IN MEMORY May 12, 2024 Pending
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