Search

Anthan Tran

Examiner (ID: 4039, Phone: (571)272-8709 , Office: P/2825 )

Most Active Art Unit
2825
Art Unit(s)
2827, 2825
Total Applications
1098
Issued Applications
898
Pending Applications
85
Abandoned Applications
150

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17195867 [patent_doc_number] => 11164632 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-02 [patent_title] => Nonvolatile memory device and method of processing in memory (PIM) using the same [patent_app_type] => utility [patent_app_number] => 17/187781 [patent_app_country] => US [patent_app_date] => 2021-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 30 [patent_no_of_words] => 11703 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17187781 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/187781
Nonvolatile memory device and method of processing in memory (PIM) using the same Feb 26, 2021 Issued
Array ( [id] => 19399487 [patent_doc_number] => 12073872 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-27 [patent_title] => Apparatuses and methods for address based memory performance [patent_app_type] => utility [patent_app_number] => 17/186797 [patent_app_country] => US [patent_app_date] => 2021-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 11563 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 362 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17186797 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/186797
Apparatuses and methods for address based memory performance Feb 25, 2021 Issued
Array ( [id] => 18415808 [patent_doc_number] => 11670353 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Current separation for memory sensing [patent_app_type] => utility [patent_app_number] => 17/187310 [patent_app_country] => US [patent_app_date] => 2021-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 6395 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17187310 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/187310
Current separation for memory sensing Feb 25, 2021 Issued
Array ( [id] => 16858487 [patent_doc_number] => 20210159232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-27 [patent_title] => Memory Devices with Gate All Around Transistors [patent_app_type] => utility [patent_app_number] => 17/168831 [patent_app_country] => US [patent_app_date] => 2021-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8001 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17168831 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/168831
Memory devices with gate all around transistors Feb 4, 2021 Issued
Array ( [id] => 17424098 [patent_doc_number] => 11257559 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-02-22 [patent_title] => Test circuit, memory device, storage device, and method of operating the same [patent_app_type] => utility [patent_app_number] => 17/161261 [patent_app_country] => US [patent_app_date] => 2021-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 14123 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17161261 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/161261
Test circuit, memory device, storage device, and method of operating the same Jan 27, 2021 Issued
Array ( [id] => 17402633 [patent_doc_number] => 20220044724 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-10 [patent_title] => MERGED BUFFER AND MEMORY DEVICE INCLUDING THE MERGED BUFFER [patent_app_type] => utility [patent_app_number] => 17/158767 [patent_app_country] => US [patent_app_date] => 2021-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12490 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17158767 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/158767
Merged buffer and memory device including the merged buffer Jan 25, 2021 Issued
Array ( [id] => 17010645 [patent_doc_number] => 20210241806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-05 [patent_title] => STREAMING ACCESS MEMORY DEVICE, SYSTEM AND METHOD [patent_app_type] => utility [patent_app_number] => 17/158875 [patent_app_country] => US [patent_app_date] => 2021-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10622 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17158875 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/158875
Streaming access memory device, system and method Jan 25, 2021 Issued
Array ( [id] => 18219335 [patent_doc_number] => 11594281 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-28 [patent_title] => Method for erasing memory cells in a flash memory device using a positive well bias voltage and a negative word line voltage [patent_app_type] => utility [patent_app_number] => 17/154241 [patent_app_country] => US [patent_app_date] => 2021-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4078 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17154241 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/154241
Method for erasing memory cells in a flash memory device using a positive well bias voltage and a negative word line voltage Jan 20, 2021 Issued
Array ( [id] => 17543890 [patent_doc_number] => 11309022 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-19 [patent_title] => RRAM voltage compensation [patent_app_type] => utility [patent_app_number] => 17/135169 [patent_app_country] => US [patent_app_date] => 2020-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 6216 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17135169 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/135169
RRAM voltage compensation Dec 27, 2020 Issued
Array ( [id] => 18898346 [patent_doc_number] => 20240013831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => MEMORY DEVICE WITH IMPROVED DRIVER OPERATION AND METHODS TO OPERATE THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/611253 [patent_app_country] => US [patent_app_date] => 2020-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17792 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17611253 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/611253
Memory device with improved driver operation and methods to operate the memory device Dec 8, 2020 Issued
Array ( [id] => 16715338 [patent_doc_number] => 20210082485 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => ASYNCHRONOUS READ CIRCUIT USING DELAY SENSING IN MAGNETORESISTIVE RANDOM ACCESS MEMORY (MRAM) [patent_app_type] => utility [patent_app_number] => 17/102716 [patent_app_country] => US [patent_app_date] => 2020-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7922 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17102716 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/102716
Asynchronous read circuit using delay sensing in magnetoresistive random access memory (MRAM) Nov 23, 2020 Issued
Array ( [id] => 17925678 [patent_doc_number] => 11468937 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-11 [patent_title] => Apparatuses and methods for generating refresh addresses [patent_app_type] => utility [patent_app_number] => 17/093334 [patent_app_country] => US [patent_app_date] => 2020-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11567 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17093334 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/093334
Apparatuses and methods for generating refresh addresses Nov 8, 2020 Issued
Array ( [id] => 16624594 [patent_doc_number] => 20210043247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => BATTERY LIFE BASED ON INHIBITED MEMORY REFRESHES [patent_app_type] => utility [patent_app_number] => 17/068732 [patent_app_country] => US [patent_app_date] => 2020-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10541 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17068732 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/068732
Battery life based on inhibited memory refreshes Oct 11, 2020 Issued
Array ( [id] => 17573925 [patent_doc_number] => 11322199 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-05-03 [patent_title] => Compute-in-memory (CIM) cell circuits employing capacitive storage circuits for reduced area and CIM bit cell array circuits [patent_app_type] => utility [patent_app_number] => 17/067205 [patent_app_country] => US [patent_app_date] => 2020-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 10072 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17067205 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/067205
Compute-in-memory (CIM) cell circuits employing capacitive storage circuits for reduced area and CIM bit cell array circuits Oct 8, 2020 Issued
Array ( [id] => 17908402 [patent_doc_number] => 11462262 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => SRAM architecture [patent_app_type] => utility [patent_app_number] => 17/062283 [patent_app_country] => US [patent_app_date] => 2020-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 7200 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17062283 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/062283
SRAM architecture Oct 1, 2020 Issued
Array ( [id] => 17522893 [patent_doc_number] => 20220108742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-07 [patent_title] => DIFFERENTIAL CHARGE SHARING FOR COMPUTE-IN-MEMORY (CIM) CELL [patent_app_type] => utility [patent_app_number] => 17/062148 [patent_app_country] => US [patent_app_date] => 2020-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3903 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17062148 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/062148
DIFFERENTIAL CHARGE SHARING FOR COMPUTE-IN-MEMORY (CIM) CELL Oct 1, 2020 Abandoned
Array ( [id] => 17485661 [patent_doc_number] => 20220093165 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => APPARATUSES AND METHODS FOR CONTROLLING REFRESH OPERATIONS [patent_app_type] => utility [patent_app_number] => 17/030018 [patent_app_country] => US [patent_app_date] => 2020-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11732 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17030018 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/030018
Apparatuses and methods for controlling refresh operations Sep 22, 2020 Issued
Array ( [id] => 17477074 [patent_doc_number] => 20220084578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => Integrated Assemblies [patent_app_type] => utility [patent_app_number] => 17/021221 [patent_app_country] => US [patent_app_date] => 2020-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8402 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -39 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17021221 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/021221
Integrated assemblies Sep 14, 2020 Issued
Array ( [id] => 17463425 [patent_doc_number] => 20220076731 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => RESERVED ROWS FOR ROW-COPY OPERATIONS FOR SEMICONDUCTOR MEMORY DEVICES AND ASSOCIATED METHODS AND SYSTEMS [patent_app_type] => utility [patent_app_number] => 17/013520 [patent_app_country] => US [patent_app_date] => 2020-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10592 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17013520 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/013520
Reserved rows for row-copy operations for semiconductor memory devices and associated methods and systems Sep 3, 2020 Issued
Array ( [id] => 16528498 [patent_doc_number] => 20200402579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => NONVOLATILE MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/010898 [patent_app_country] => US [patent_app_date] => 2020-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14300 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17010898 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/010898
Nonvolatile memory device and memory system including the same Sep 2, 2020 Issued
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