Search

Anthan Tran

Examiner (ID: 4039, Phone: (571)272-8709 , Office: P/2825 )

Most Active Art Unit
2825
Art Unit(s)
2827, 2825
Total Applications
1098
Issued Applications
898
Pending Applications
85
Abandoned Applications
150

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17032544 [patent_doc_number] => 11094361 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-17 [patent_title] => Transistorless memory cell [patent_app_type] => utility [patent_app_number] => 16/122057 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 9138 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122057 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122057
Transistorless memory cell Sep 4, 2018 Issued
Array ( [id] => 15597051 [patent_doc_number] => 20200075060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => OFF-CHIP DRIVER [patent_app_type] => utility [patent_app_number] => 16/115579 [patent_app_country] => US [patent_app_date] => 2018-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4373 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16115579 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/115579
Off-chip driver Aug 28, 2018 Issued
Array ( [id] => 14190761 [patent_doc_number] => 20190115086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => VOLTAGE DRIVER FOR MEMORY [patent_app_type] => utility [patent_app_number] => 16/113265 [patent_app_country] => US [patent_app_date] => 2018-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6017 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16113265 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/113265
Voltage driver for memory Aug 26, 2018 Issued
Array ( [id] => 14237593 [patent_doc_number] => 20190130969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/100295 [patent_app_country] => US [patent_app_date] => 2018-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8891 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16100295 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/100295
Memory device Aug 9, 2018 Issued
Array ( [id] => 16279921 [patent_doc_number] => 10762959 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-01 [patent_title] => Writing multiple levels in a phase change memory [patent_app_type] => utility [patent_app_number] => 15/989481 [patent_app_country] => US [patent_app_date] => 2018-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 14043 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15989481 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/989481
Writing multiple levels in a phase change memory May 24, 2018 Issued
Array ( [id] => 15153903 [patent_doc_number] => 20190355429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => MEMORY DEVICE WITH VPASS STEP TO REDUCE HOT CARRIER INJECTION TYPE OF PROGRAM DISTURB [patent_app_type] => utility [patent_app_number] => 15/983365 [patent_app_country] => US [patent_app_date] => 2018-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15383 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15983365 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/983365
Memory device with vpass step to reduce hot carrier injection type of program disturb May 17, 2018 Issued
Array ( [id] => 14049313 [patent_doc_number] => 20190080763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 15/982205 [patent_app_country] => US [patent_app_date] => 2018-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10359 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15982205 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/982205
SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM May 16, 2018 Abandoned
Array ( [id] => 15122941 [patent_doc_number] => 20190348104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => LOW POWER METHOD AND SYSTEM FOR SIGNAL SLEW RATE CONTROL [patent_app_type] => utility [patent_app_number] => 15/976739 [patent_app_country] => US [patent_app_date] => 2018-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8827 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15976739 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/976739
Low power method and system for signal slew rate control May 9, 2018 Issued
Array ( [id] => 15427403 [patent_doc_number] => 10546636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-28 [patent_title] => Apparatuses and methods for accessing variable resistance memory device [patent_app_type] => utility [patent_app_number] => 15/971723 [patent_app_country] => US [patent_app_date] => 2018-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 7283 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15971723 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/971723
Apparatuses and methods for accessing variable resistance memory device May 3, 2018 Issued
Array ( [id] => 15732921 [patent_doc_number] => 10614893 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-07 [patent_title] => Nonvolatile memory device, semiconductor device, and electronic apparatus [patent_app_type] => utility [patent_app_number] => 15/969149 [patent_app_country] => US [patent_app_date] => 2018-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 13114 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15969149 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/969149
Nonvolatile memory device, semiconductor device, and electronic apparatus May 1, 2018 Issued
Array ( [id] => 14078907 [patent_doc_number] => 20190088341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => NONVOLATILE MEMORY DEVICE AND OPERATING METHOD OF THE SAME [patent_app_type] => utility [patent_app_number] => 15/959323 [patent_app_country] => US [patent_app_date] => 2018-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9200 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15959323 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/959323
Nonvolatile memory device and operating method of the same Apr 22, 2018 Issued
Array ( [id] => 15474833 [patent_doc_number] => 10553299 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Magnetic domain wall type analog memory element, magnetic domain wall type analog memory, nonvolatile logic circuit, and magnetic neuro-element [patent_app_type] => utility [patent_app_number] => 15/945119 [patent_app_country] => US [patent_app_date] => 2018-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 14061 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 318 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15945119 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/945119
Magnetic domain wall type analog memory element, magnetic domain wall type analog memory, nonvolatile logic circuit, and magnetic neuro-element Apr 3, 2018 Issued
Array ( [id] => 14937771 [patent_doc_number] => 20190304524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => SPIN ORBIT TORQUE (SOT) MEMORY DEVICES WITH ENHANCED STABILITY AND THEIR METHODS OF FABRICATION [patent_app_type] => utility [patent_app_number] => 15/942349 [patent_app_country] => US [patent_app_date] => 2018-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13327 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15942349 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/942349
SPIN ORBIT TORQUE (SOT) MEMORY DEVICES WITH ENHANCED STABILITY AND THEIR METHODS OF FABRICATION Mar 29, 2018 Abandoned
Array ( [id] => 15060937 [patent_doc_number] => 10460780 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-29 [patent_title] => Magneto-resistive random access memory (MRAM) employing an integrated physically unclonable function (PUF) memory [patent_app_type] => utility [patent_app_number] => 15/939923 [patent_app_country] => US [patent_app_date] => 2018-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 13483 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 319 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15939923 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/939923
Magneto-resistive random access memory (MRAM) employing an integrated physically unclonable function (PUF) memory Mar 28, 2018 Issued
Array ( [id] => 14937755 [patent_doc_number] => 20190304516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => APPARATUSES AND METHODS FOR COUPLING DATA LINES IN MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 15/938965 [patent_app_country] => US [patent_app_date] => 2018-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9835 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15938965 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/938965
APPARATUSES AND METHODS FOR COUPLING DATA LINES IN MEMORY DEVICES Mar 27, 2018 Abandoned
Array ( [id] => 13908759 [patent_doc_number] => 20190043584 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => MEMORY DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 15/933979 [patent_app_country] => US [patent_app_date] => 2018-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14927 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15933979 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/933979
Memory device and method of operating the same Mar 22, 2018 Issued
Array ( [id] => 13320333 [patent_doc_number] => 20180211704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-26 [patent_title] => NODE RETAINER CIRCUIT INCORPORATING RRAM [patent_app_type] => utility [patent_app_number] => 15/926394 [patent_app_country] => US [patent_app_date] => 2018-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11108 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15926394 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/926394
Node retainer circuit incorporating RRAM Mar 19, 2018 Issued
Array ( [id] => 14874731 [patent_doc_number] => 20190287607 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => System and Method for Memory Fault Resiliency in a Server using Multi-Channel Dynamic Random Access Memory [patent_app_type] => utility [patent_app_number] => 15/924909 [patent_app_country] => US [patent_app_date] => 2018-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5381 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15924909 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/924909
System and method for memory fault resiliency in a server using multi-channel dynamic random access memory Mar 18, 2018 Issued
Array ( [id] => 16233673 [patent_doc_number] => 10741233 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-11 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 15/906621 [patent_app_country] => US [patent_app_date] => 2018-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 38 [patent_no_of_words] => 15883 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15906621 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/906621
Semiconductor memory device Feb 26, 2018 Issued
Array ( [id] => 14491563 [patent_doc_number] => 10332579 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-25 [patent_title] => DRAM and method for operating the same [patent_app_type] => utility [patent_app_number] => 15/900421 [patent_app_country] => US [patent_app_date] => 2018-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9044 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15900421 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/900421
DRAM and method for operating the same Feb 19, 2018 Issued
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