Search

Anthan Tran

Examiner (ID: 4039, Phone: (571)272-8709 , Office: P/2825 )

Most Active Art Unit
2825
Art Unit(s)
2827, 2825
Total Applications
1098
Issued Applications
898
Pending Applications
85
Abandoned Applications
150

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13976273 [patent_doc_number] => 10217499 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-26 [patent_title] => Modified decode for corner turn [patent_app_type] => utility [patent_app_number] => 15/899092 [patent_app_country] => US [patent_app_date] => 2018-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 14251 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15899092 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/899092
Modified decode for corner turn Feb 18, 2018 Issued
Array ( [id] => 13878235 [patent_doc_number] => 20190035458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => RRAM-BASED MONOTONIC COUNTER [patent_app_type] => utility [patent_app_number] => 15/898119 [patent_app_country] => US [patent_app_date] => 2018-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6641 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15898119 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/898119
RRAM-based monotonic counter Feb 14, 2018 Issued
Array ( [id] => 13582249 [patent_doc_number] => 20180342673 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-29 [patent_title] => PHASE CHANGE MEMORY APPARATUS [patent_app_type] => utility [patent_app_number] => 15/887079 [patent_app_country] => US [patent_app_date] => 2018-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4374 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15887079 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/887079
Phase change memory apparatus Feb 1, 2018 Issued
Array ( [id] => 15401225 [patent_doc_number] => 10541274 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-21 [patent_title] => Scalable, stackable, and BEOL-process compatible integrated neuron circuit [patent_app_type] => utility [patent_app_number] => 15/879363 [patent_app_country] => US [patent_app_date] => 2018-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 23 [patent_no_of_words] => 9720 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15879363 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/879363
Scalable, stackable, and BEOL-process compatible integrated neuron circuit Jan 23, 2018 Issued
Array ( [id] => 14011273 [patent_doc_number] => 10224111 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-05 [patent_title] => Error characterization and mitigation for 16 nm MLC NAND flash memory under total ionizing dose effect [patent_app_type] => utility [patent_app_number] => 15/849423 [patent_app_country] => US [patent_app_date] => 2017-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 10704 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15849423 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/849423
Error characterization and mitigation for 16 nm MLC NAND flash memory under total ionizing dose effect Dec 19, 2017 Issued
Array ( [id] => 15233695 [patent_doc_number] => 10504576 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-10 [patent_title] => Current separation for memory sensing [patent_app_type] => utility [patent_app_number] => 15/846765 [patent_app_country] => US [patent_app_date] => 2017-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 6330 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15846765 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/846765
Current separation for memory sensing Dec 18, 2017 Issued
Array ( [id] => 13484951 [patent_doc_number] => 20180294018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-11 [patent_title] => MEMORY DEVICES COMPRISING A WRITE ASSIST CIRCUIT [patent_app_type] => utility [patent_app_number] => 15/840601 [patent_app_country] => US [patent_app_date] => 2017-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15363 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15840601 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/840601
Memory devices comprising a write assist circuit Dec 12, 2017 Issued
Array ( [id] => 12616032 [patent_doc_number] => 20180097174 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-05 [patent_title] => SPIN TRANSFER TORQUE MAGNETIC TUNNEL JUNCTION WITH OFF-CENTERED CURRENT FLOW [patent_app_type] => utility [patent_app_number] => 15/830604 [patent_app_country] => US [patent_app_date] => 2017-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6957 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15830604 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/830604
Spin transfer torque magnetic tunnel junction with off-centered current flow Dec 3, 2017 Issued
Array ( [id] => 14036329 [patent_doc_number] => 10229920 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-03-12 [patent_title] => One-time programmable vertical field-effect transistor [patent_app_type] => utility [patent_app_number] => 15/822557 [patent_app_country] => US [patent_app_date] => 2017-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 18714 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15822557 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/822557
One-time programmable vertical field-effect transistor Nov 26, 2017 Issued
Array ( [id] => 14800693 [patent_doc_number] => 10403355 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Phase change memory device capable of decreasing a disturbance [patent_app_type] => utility [patent_app_number] => 15/818425 [patent_app_country] => US [patent_app_date] => 2017-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6410 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15818425 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/818425
Phase change memory device capable of decreasing a disturbance Nov 19, 2017 Issued
Array ( [id] => 12848380 [patent_doc_number] => 20180174633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-21 [patent_title] => SEMICONDUCTOR APPARATUS, SEMICONDUCTOR SYSTEM, AND TRAINING METHOD [patent_app_type] => utility [patent_app_number] => 15/815939 [patent_app_country] => US [patent_app_date] => 2017-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4721 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15815939 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/815939
Semiconductor apparatus, semiconductor system, and training method Nov 16, 2017 Issued
Array ( [id] => 12595179 [patent_doc_number] => 20180090223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-29 [patent_title] => RECLAIMABLE SEMICONDUCTOR DEVICE PACKAGE AND ASSOCIATED SYSTEMS AND METHODS [patent_app_type] => utility [patent_app_number] => 15/815521 [patent_app_country] => US [patent_app_date] => 2017-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5040 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15815521 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/815521
Reclaimable semiconductor device package and associated systems and methods Nov 15, 2017 Issued
Array ( [id] => 15597121 [patent_doc_number] => 20200075095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => Generating a Reference Current for Sensing [patent_app_type] => utility [patent_app_number] => 16/466149 [patent_app_country] => US [patent_app_date] => 2017-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9689 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16466149 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/466149
Generating a reference current for sensing Nov 9, 2017 Issued
Array ( [id] => 14282315 [patent_doc_number] => 20190138442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => CONFIGURABLE TRIM SETTINGS ON A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/802551 [patent_app_country] => US [patent_app_date] => 2017-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5676 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15802551 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/802551
Configurable trim settings on a memory device Nov 2, 2017 Issued
Array ( [id] => 13484983 [patent_doc_number] => 20180294034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-11 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 15/798525 [patent_app_country] => US [patent_app_date] => 2017-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6611 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15798525 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/798525
Semiconductor memory device and method of operating the same Oct 30, 2017 Issued
Array ( [id] => 14237589 [patent_doc_number] => 20190130967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => ADAPTIVE READ THRESHOLD VOLTAGE TRACKING WITH CHARGE LEAKAGE MITIGATION USING CHARGE LEAKAGE SETTLING TIME [patent_app_type] => utility [patent_app_number] => 15/799497 [patent_app_country] => US [patent_app_date] => 2017-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9814 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15799497 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/799497
Adaptive read threshold voltage tracking with charge leakage mitigation using charge leakage settling time Oct 30, 2017 Issued
Array ( [id] => 14706657 [patent_doc_number] => 10381086 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-13 [patent_title] => Multiple blocks per string in 3D NAND memory [patent_app_type] => utility [patent_app_number] => 15/728482 [patent_app_country] => US [patent_app_date] => 2017-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 11950 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15728482 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/728482
Multiple blocks per string in 3D NAND memory Oct 8, 2017 Issued
Array ( [id] => 13434693 [patent_doc_number] => 20180268889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-20 [patent_title] => MAGNETIC MEMORY DEVICE WITH ENHANCED WRITE PERFORMANCE AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/724905 [patent_app_country] => US [patent_app_date] => 2017-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5194 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15724905 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/724905
Magnetic memory device with enhanced write performance and operation method thereof Oct 3, 2017 Issued
Array ( [id] => 12822832 [patent_doc_number] => 20180166116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-14 [patent_title] => DIMM DRAM MEMORY CHIPS QUICK OPTICAL DATA ERASURE AFTER POWER CYCLING [patent_app_type] => utility [patent_app_number] => 15/724435 [patent_app_country] => US [patent_app_date] => 2017-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2525 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15724435 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/724435
DIMM DRAM memory chips quick optical data erasure after power cycling Oct 3, 2017 Issued
Array ( [id] => 13766747 [patent_doc_number] => 10175714 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-08 [patent_title] => Enable signal generation circuit [patent_app_type] => utility [patent_app_number] => 15/722249 [patent_app_country] => US [patent_app_date] => 2017-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4360 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15722249 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/722249
Enable signal generation circuit Oct 1, 2017 Issued
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