Search

Anthan Tran

Examiner (ID: 4039, Phone: (571)272-8709 , Office: P/2825 )

Most Active Art Unit
2825
Art Unit(s)
2827, 2825
Total Applications
1098
Issued Applications
898
Pending Applications
85
Abandoned Applications
150

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12935311 [patent_doc_number] => 09830989 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-28 [patent_title] => Non-volatile semiconductor storage device [patent_app_type] => utility [patent_app_number] => 15/304649 [patent_app_country] => US [patent_app_date] => 2015-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 30218 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15304649 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/304649
Non-volatile semiconductor storage device Apr 19, 2015 Issued
Array ( [id] => 15669025 [patent_doc_number] => 10598735 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-24 [patent_title] => Method and apparatus for estimating battery life corresponding to characteristic of usage based on pattern information [patent_app_type] => utility [patent_app_number] => 14/682470 [patent_app_country] => US [patent_app_date] => 2015-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 7982 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14682470 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/682470
Method and apparatus for estimating battery life corresponding to characteristic of usage based on pattern information Apr 8, 2015 Issued
Array ( [id] => 11810849 [patent_doc_number] => 09715419 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-25 [patent_title] => 'Selective reading of memory with improved accuracy' [patent_app_type] => utility [patent_app_number] => 14/681471 [patent_app_country] => US [patent_app_date] => 2015-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5533 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14681471 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/681471
Selective reading of memory with improved accuracy Apr 7, 2015 Issued
Array ( [id] => 10391974 [patent_doc_number] => 20150276981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'METHOD AND APPARATUS FOR LIGHTNING FORECAST' [patent_app_type] => utility [patent_app_number] => 14/674574 [patent_app_country] => US [patent_app_date] => 2015-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5679 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14674574 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/674574
Method and apparatus for lightning forecast Mar 30, 2015 Issued
Array ( [id] => 11180431 [patent_doc_number] => 09412425 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-09 [patent_title] => 'Device and method for improving reading speed of memory' [patent_app_type] => utility [patent_app_number] => 14/673530 [patent_app_country] => US [patent_app_date] => 2015-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8390 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14673530 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/673530
Device and method for improving reading speed of memory Mar 29, 2015 Issued
Array ( [id] => 10732756 [patent_doc_number] => 20160078906 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-17 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/657345 [patent_app_country] => US [patent_app_date] => 2015-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5139 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14657345 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/657345
Semiconductor device Mar 12, 2015 Issued
Array ( [id] => 10764980 [patent_doc_number] => 20160111135 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-21 [patent_title] => 'INPUT/OUTPUT STROBE PULSE CONTROL CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/656309 [patent_app_country] => US [patent_app_date] => 2015-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4256 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14656309 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/656309
Input/output strobe pulse control circuit and semiconductor memory device including the same Mar 11, 2015 Issued
Array ( [id] => 11233533 [patent_doc_number] => 09460764 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-04 [patent_title] => 'Buffer control circuit of semiconductor memory apparatus' [patent_app_type] => utility [patent_app_number] => 14/644753 [patent_app_country] => US [patent_app_date] => 2015-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5778 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14644753 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/644753
Buffer control circuit of semiconductor memory apparatus Mar 10, 2015 Issued
Array ( [id] => 10277382 [patent_doc_number] => 20150162379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-11 [patent_title] => 'SCALABLE ORTHOGONAL SPIN TRANSFER MAGNETIC RANDOM ACCESS MEMORY DEVICES WITH REDUCED WRITE ERROR RATES' [patent_app_type] => utility [patent_app_number] => 14/622453 [patent_app_country] => US [patent_app_date] => 2015-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4078 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14622453 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/622453
Scalable orthogonal spin transfer magnetic random access memory devices with reduced write error rates Feb 12, 2015 Issued
Array ( [id] => 10277058 [patent_doc_number] => 20150162054 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-11 [patent_title] => 'MEMORY DEVICE AND SIGNAL PROCESSING CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/621677 [patent_app_country] => US [patent_app_date] => 2015-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 36675 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14621677 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/621677
Memory device and signal processing circuit Feb 12, 2015 Issued
Array ( [id] => 10261485 [patent_doc_number] => 20150146482 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-28 [patent_title] => 'METHOD AND APPARATUS FOR READING A MAGNETIC TUNNEL JUNCTION USING A SEQUENCE OF SHORT PULSES' [patent_app_type] => utility [patent_app_number] => 14/599450 [patent_app_country] => US [patent_app_date] => 2015-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3126 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14599450 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/599450
Method and apparatus for reading a magnetic tunnel junction using a sequence of short pulses Jan 15, 2015 Issued
Array ( [id] => 10223667 [patent_doc_number] => 20150108660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-23 [patent_title] => 'STACKED MEMORY WITH INTERFACE PROVIDING OFFSET INTERCONNECTS' [patent_app_type] => utility [patent_app_number] => 14/588183 [patent_app_country] => US [patent_app_date] => 2014-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5406 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14588183 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/588183
Stacked memory with interface providing offset interconnects Dec 30, 2014 Issued
Array ( [id] => 10207494 [patent_doc_number] => 20150092483 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-02 [patent_title] => 'MODIFIED RESET STATE FOR ENHANCED READ MARGIN OF PHASE CHANGE MEMORY' [patent_app_type] => utility [patent_app_number] => 14/563731 [patent_app_country] => US [patent_app_date] => 2014-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5727 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14563731 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/563731
Modified reset state for enhanced read margin of phase change memory Dec 7, 2014 Issued
Array ( [id] => 10417916 [patent_doc_number] => 20150302925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-22 [patent_title] => 'ELECTRONIC DEVICE INCLUDING SEMICONDUCTOR MEMORY AND OPERATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/560819 [patent_app_country] => US [patent_app_date] => 2014-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10660 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14560819 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/560819
ELECTRONIC DEVICE INCLUDING SEMICONDUCTOR MEMORY AND OPERATION METHOD THEREOF Dec 3, 2014 Abandoned
Array ( [id] => 12335571 [patent_doc_number] => 09947859 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-17 [patent_title] => Electronic device and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 14/559546 [patent_app_country] => US [patent_app_date] => 2014-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 10183 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14559546 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/559546
Electronic device and method for fabricating the same Dec 2, 2014 Issued
Array ( [id] => 11070982 [patent_doc_number] => 20160267946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-15 [patent_title] => 'STACK MEMORY DEVICE AND METHOD FOR OPERATING SAME' [patent_app_type] => utility [patent_app_number] => 15/032935 [patent_app_country] => US [patent_app_date] => 2014-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7644 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15032935 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/032935
STACK MEMORY DEVICE AND METHOD FOR OPERATING SAME Oct 26, 2014 Abandoned
Array ( [id] => 10624213 [patent_doc_number] => 09343161 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-17 [patent_title] => 'Semiconductor memory device and methods of operating the same' [patent_app_type] => utility [patent_app_number] => 14/516759 [patent_app_country] => US [patent_app_date] => 2014-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 4817 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14516759 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/516759
Semiconductor memory device and methods of operating the same Oct 16, 2014 Issued
Array ( [id] => 9811150 [patent_doc_number] => 20150023095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-22 [patent_title] => 'APPARATUSES INCLUDING CURRENT COMPLIANCE CIRCUITS AND METHODS' [patent_app_type] => utility [patent_app_number] => 14/510950 [patent_app_country] => US [patent_app_date] => 2014-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3826 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14510950 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/510950
Apparatuses including current compliance circuits and methods Oct 8, 2014 Issued
Array ( [id] => 11049381 [patent_doc_number] => 20160246340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-25 [patent_title] => 'Media Device Enclosure System' [patent_app_type] => utility [patent_app_number] => 15/025802 [patent_app_country] => US [patent_app_date] => 2014-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4253 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15025802 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/025802
Media device enclosure system Oct 1, 2014 Issued
Array ( [id] => 10253890 [patent_doc_number] => 20150138887 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-21 [patent_title] => 'METHOD AND SYSTEM FOR IMPROVING THE RADIATION TOLERANCE OF FLOATING GATE MEMORIES' [patent_app_type] => utility [patent_app_number] => 14/502571 [patent_app_country] => US [patent_app_date] => 2014-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7191 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14502571 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/502571
Method and system for improving the radiation tolerance of floating gate memories Sep 29, 2014 Issued
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