Search

Anthan Tran

Examiner (ID: 7284, Phone: (571)272-8709 , Office: P/2825 )

Most Active Art Unit
2825
Art Unit(s)
2825, 2827
Total Applications
1125
Issued Applications
917
Pending Applications
74
Abandoned Applications
152

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18500289 [patent_doc_number] => 20230223074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => READOUT CIRCUIT LAYOUT [patent_app_type] => utility [patent_app_number] => 17/805991 [patent_app_country] => US [patent_app_date] => 2022-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6488 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17805991 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/805991
READOUT CIRCUIT LAYOUT Jun 7, 2022 Abandoned
Array ( [id] => 17884733 [patent_doc_number] => 20220300210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => MULTIPLEXED SIGNAL DEVELOPMENT IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/834659 [patent_app_country] => US [patent_app_date] => 2022-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 43899 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17834659 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/834659
Multiplexed signal development in a memory device Jun 6, 2022 Issued
Array ( [id] => 18820799 [patent_doc_number] => 20230395140 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => VARIATION TOLERANT RECONFIGURABLE REPLICA BITLINE CIRCUITS [patent_app_type] => utility [patent_app_number] => 17/834073 [patent_app_country] => US [patent_app_date] => 2022-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7161 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17834073 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/834073
Variation tolerant reconfigurable replica bitline circuits Jun 6, 2022 Issued
Array ( [id] => 18820767 [patent_doc_number] => 20230395108 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => METHODS AND SYSTEMS FOR SELECTIVELY ENABLING/DISABLING MEMORY DIES [patent_app_type] => utility [patent_app_number] => 17/832479 [patent_app_country] => US [patent_app_date] => 2022-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28445 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17832479 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/832479
Methods and systems for selectively enabling/disabling memory dies Jun 2, 2022 Issued
Array ( [id] => 19918410 [patent_doc_number] => 12293783 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => Voltage management for improved tRP timing for FeRAM devices [patent_app_type] => utility [patent_app_number] => 17/829054 [patent_app_country] => US [patent_app_date] => 2022-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17829054 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/829054
Voltage management for improved tRP timing for FeRAM devices May 30, 2022 Issued
Array ( [id] => 17870453 [patent_doc_number] => 20220293190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => MEMORY DEVICE AND METHOD OF READING DATA [patent_app_type] => utility [patent_app_number] => 17/827852 [patent_app_country] => US [patent_app_date] => 2022-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10763 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 325 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17827852 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/827852
Memory device and method of reading data May 29, 2022 Issued
17/752489 SYSTEMS AND METHODS FOR IDENTIFYING COUNTERFEIT MEMORY May 23, 2022 Abandoned
Array ( [id] => 18890833 [patent_doc_number] => 11869610 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Storage device [patent_app_type] => utility [patent_app_number] => 17/664035 [patent_app_country] => US [patent_app_date] => 2022-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5623 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17664035 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/664035
Storage device May 17, 2022 Issued
Array ( [id] => 18379422 [patent_doc_number] => 20230154511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => MEMORY CHIP AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/746477 [patent_app_country] => US [patent_app_date] => 2022-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12920 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17746477 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/746477
Memory chip and operating method thereof May 16, 2022 Issued
Array ( [id] => 18874411 [patent_doc_number] => 11862232 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Circuit and method for data transmission, and storage apparatus [patent_app_type] => utility [patent_app_number] => 17/742654 [patent_app_country] => US [patent_app_date] => 2022-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8249 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17742654 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/742654
Circuit and method for data transmission, and storage apparatus May 11, 2022 Issued
Array ( [id] => 18196128 [patent_doc_number] => 20230049647 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => AMPLIFIER AND MEMORY [patent_app_type] => utility [patent_app_number] => 17/663053 [patent_app_country] => US [patent_app_date] => 2022-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4001 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17663053 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/663053
AMPLIFIER AND MEMORY May 11, 2022 Abandoned
Array ( [id] => 18774011 [patent_doc_number] => 20230368841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => TERNARY CONTENT ADDRESSABLE MEMORY [patent_app_type] => utility [patent_app_number] => 17/742148 [patent_app_country] => US [patent_app_date] => 2022-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5932 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17742148 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/742148
Ternary content addressable memory May 10, 2022 Issued
Array ( [id] => 17779860 [patent_doc_number] => 20220246210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => THREE-STATE PROGRAMMING OF MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 17/727493 [patent_app_country] => US [patent_app_date] => 2022-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7773 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17727493 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/727493
Three-state programming of memory cells Apr 21, 2022 Issued
Array ( [id] => 17764542 [patent_doc_number] => 20220238155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => RRAM VOLTAGE COMPENSATION [patent_app_type] => utility [patent_app_number] => 17/721985 [patent_app_country] => US [patent_app_date] => 2022-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6262 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17721985 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/721985
RRAM voltage compensation Apr 14, 2022 Issued
Array ( [id] => 19626886 [patent_doc_number] => 12165733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-10 [patent_title] => Sense amplifier, memory device and operation method thereof [patent_app_type] => utility [patent_app_number] => 17/720296 [patent_app_country] => US [patent_app_date] => 2022-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4948 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17720296 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/720296
Sense amplifier, memory device and operation method thereof Apr 13, 2022 Issued
Array ( [id] => 20080571 [patent_doc_number] => 12354646 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Dynamic memory with sustainable storage architecture [patent_app_type] => utility [patent_app_number] => 17/717116 [patent_app_country] => US [patent_app_date] => 2022-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 1213 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17717116 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/717116
Dynamic memory with sustainable storage architecture Apr 9, 2022 Issued
Array ( [id] => 18696090 [patent_doc_number] => 20230326521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => MEMORY DEVICE AND SYSTEM [patent_app_type] => utility [patent_app_number] => 17/716609 [patent_app_country] => US [patent_app_date] => 2022-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9315 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17716609 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/716609
Memory device and system Apr 7, 2022 Issued
Array ( [id] => 17737727 [patent_doc_number] => 20220223189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => LARGE FILE INTEGRITY TECHNIQUES [patent_app_type] => utility [patent_app_number] => 17/708629 [patent_app_country] => US [patent_app_date] => 2022-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9040 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17708629 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/708629
Large file integrity techniques Mar 29, 2022 Issued
Array ( [id] => 18661024 [patent_doc_number] => 20230307037 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => CLUSTERING FOR READ THRESHOLDS HISTORY TABLE COMPRESSION IN NAND STORAGE SYSTEMS [patent_app_type] => utility [patent_app_number] => 17/703199 [patent_app_country] => US [patent_app_date] => 2022-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12470 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17703199 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/703199
Clustering for read thresholds history table compression in NAND storage systems Mar 23, 2022 Issued
Array ( [id] => 19796036 [patent_doc_number] => 12237001 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Apparatuses including output drivers and methods for providing output data signals [patent_app_type] => utility [patent_app_number] => 17/700289 [patent_app_country] => US [patent_app_date] => 2022-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6818 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17700289 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/700289
Apparatuses including output drivers and methods for providing output data signals Mar 20, 2022 Issued
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