Search

Anthony Bartis

Examiner (ID: 7244)

Most Active Art Unit
2106
Art Unit(s)
2103, 2106, 2305, 3404
Total Applications
791
Issued Applications
709
Pending Applications
1
Abandoned Applications
81

Applications

Application numberTitle of the applicationFiling DateStatus
07/891918 COMPOUND SEMICONDUCTOR DEVICE HAVING GATE ELECTRODE SELF-ALIGNED TO SOURCE AND DRAIN ELECTRODES AND METHOD OF MANUFACTURING THE SAME May 31, 1992 Abandoned
Array ( [id] => 3017330 [patent_doc_number] => 05309010 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-03 [patent_title] => 'Semiconductor device having improved thin film transistors' [patent_app_type] => 1 [patent_app_number] => 7/888806 [patent_app_country] => US [patent_app_date] => 1992-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 26 [patent_no_of_words] => 7829 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/309/05309010.pdf [firstpage_image] =>[orig_patent_app_number] => 888806 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/888806
Semiconductor device having improved thin film transistors May 26, 1992 Issued
07/886254 FIELD EFFECT TRANSISTOR AND ITS MANUFACTURING METHOD May 20, 1992 Abandoned
Array ( [id] => 3054630 [patent_doc_number] => 05306928 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-26 [patent_title] => 'Diamond semiconductor device having a non-doped diamond layer formed between a BN substrate and an active diamond layer' [patent_app_type] => 1 [patent_app_number] => 7/884138 [patent_app_country] => US [patent_app_date] => 1992-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2272 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/306/05306928.pdf [firstpage_image] =>[orig_patent_app_number] => 884138 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/884138
Diamond semiconductor device having a non-doped diamond layer formed between a BN substrate and an active diamond layer May 17, 1992 Issued
Array ( [id] => 3055090 [patent_doc_number] => 05306951 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-26 [patent_title] => 'Sidewall silicidation for improved reliability and conductivity' [patent_app_type] => 1 [patent_app_number] => 7/883008 [patent_app_country] => US [patent_app_date] => 1992-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 1901 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/306/05306951.pdf [firstpage_image] =>[orig_patent_app_number] => 883008 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/883008
Sidewall silicidation for improved reliability and conductivity May 13, 1992 Issued
Array ( [id] => 3520473 [patent_doc_number] => 05486716 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-23 [patent_title] => 'Semiconductor integrated circuit device with electrostatic damage protection' [patent_app_type] => 1 [patent_app_number] => 7/880720 [patent_app_country] => US [patent_app_date] => 1992-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 34 [patent_no_of_words] => 7158 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/486/05486716.pdf [firstpage_image] =>[orig_patent_app_number] => 880720 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/880720
Semiconductor integrated circuit device with electrostatic damage protection May 7, 1992 Issued
07/880120 THIN FILM TRANSISTOR AND METHOD OF MANUFACTURE May 6, 1992 Abandoned
Array ( [id] => 3006644 [patent_doc_number] => 05371395 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-06 [patent_title] => 'High voltage input pad protection circuitry' [patent_app_type] => 1 [patent_app_number] => 7/879626 [patent_app_country] => US [patent_app_date] => 1992-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5351 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/371/05371395.pdf [firstpage_image] =>[orig_patent_app_number] => 879626 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/879626
High voltage input pad protection circuitry May 5, 1992 Issued
Array ( [id] => 2967590 [patent_doc_number] => 05264720 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-23 [patent_title] => 'High withstanding voltage transistor' [patent_app_type] => 1 [patent_app_number] => 7/879550 [patent_app_country] => US [patent_app_date] => 1992-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2914 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/264/05264720.pdf [firstpage_image] =>[orig_patent_app_number] => 879550 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/879550
High withstanding voltage transistor May 3, 1992 Issued
Array ( [id] => 2899530 [patent_doc_number] => 05241207 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-31 [patent_title] => 'Semiconductor device having an interconnected film with tapered edge' [patent_app_type] => 1 [patent_app_number] => 7/878418 [patent_app_country] => US [patent_app_date] => 1992-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 15 [patent_no_of_words] => 4173 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/241/05241207.pdf [firstpage_image] =>[orig_patent_app_number] => 878418 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/878418
Semiconductor device having an interconnected film with tapered edge May 3, 1992 Issued
07/869084 MIS DEVICE HAVING P CHANNEL MOS DEVICE AND N CHANNEL MOS DEVICE WITH LDD STRUCTURE AND MANUFACTURING METHOD THEREOF Apr 14, 1992 Abandoned
Array ( [id] => 3100232 [patent_doc_number] => 05293056 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-08 [patent_title] => 'Semiconductor device with high off-breakdown-voltage and low on resistance' [patent_app_type] => 1 [patent_app_number] => 7/863758 [patent_app_country] => US [patent_app_date] => 1992-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 5973 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/293/05293056.pdf [firstpage_image] =>[orig_patent_app_number] => 863758 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/863758
Semiconductor device with high off-breakdown-voltage and low on resistance Apr 5, 1992 Issued
Array ( [id] => 3118046 [patent_doc_number] => 05396100 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-03-07 [patent_title] => 'Semiconductor integrated circuit device having a compact arrangement of SRAM cells' [patent_app_type] => 1 [patent_app_number] => 7/861366 [patent_app_country] => US [patent_app_date] => 1992-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 66 [patent_no_of_words] => 56809 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/396/05396100.pdf [firstpage_image] =>[orig_patent_app_number] => 861366 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/861366
Semiconductor integrated circuit device having a compact arrangement of SRAM cells Mar 30, 1992 Issued
Array ( [id] => 3100151 [patent_doc_number] => 05293052 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-08 [patent_title] => 'SOT CMOS device having differentially doped body extension for providing improved backside leakage channel stop' [patent_app_type] => 1 [patent_app_number] => 7/855834 [patent_app_country] => US [patent_app_date] => 1992-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2634 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/293/05293052.pdf [firstpage_image] =>[orig_patent_app_number] => 855834 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/855834
SOT CMOS device having differentially doped body extension for providing improved backside leakage channel stop Mar 22, 1992 Issued
07/854188 LATERAL INSULATED GATE FIELD EFFECT SEMICONDUCTOR DEVICE Mar 19, 1992 Abandoned
Array ( [id] => 3068602 [patent_doc_number] => 05311051 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-10 [patent_title] => 'Field effect transistor with offset region' [patent_app_type] => 1 [patent_app_number] => 7/854084 [patent_app_country] => US [patent_app_date] => 1992-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 3894 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/311/05311051.pdf [firstpage_image] =>[orig_patent_app_number] => 854084 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/854084
Field effect transistor with offset region Mar 18, 1992 Issued
07/852710 SEMICONDUCTOR DEVICE Mar 16, 1992 Abandoned
Array ( [id] => 3096987 [patent_doc_number] => 05313076 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-17 [patent_title] => 'Thin film transistor and semiconductor device including a laser crystallized semiconductor' [patent_app_type] => 1 [patent_app_number] => 7/853690 [patent_app_country] => US [patent_app_date] => 1992-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 12051 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/313/05313076.pdf [firstpage_image] =>[orig_patent_app_number] => 853690 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/853690
Thin film transistor and semiconductor device including a laser crystallized semiconductor Mar 16, 1992 Issued
Array ( [id] => 2959270 [patent_doc_number] => 05243208 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-09-07 [patent_title] => 'Semiconductor integrated circuit device having a gate array with a ram and by-pass signal lines which interconnect a logic section and I/O unit circuit of the gate array' [patent_app_type] => 1 [patent_app_number] => 7/853090 [patent_app_country] => US [patent_app_date] => 1992-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 98 [patent_no_of_words] => 33413 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/243/05243208.pdf [firstpage_image] =>[orig_patent_app_number] => 853090 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/853090
Semiconductor integrated circuit device having a gate array with a ram and by-pass signal lines which interconnect a logic section and I/O unit circuit of the gate array Mar 16, 1992 Issued
Array ( [id] => 2991259 [patent_doc_number] => 05266824 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-30 [patent_title] => 'SOI semiconductor substrate' [patent_app_type] => 1 [patent_app_number] => 7/852064 [patent_app_country] => US [patent_app_date] => 1992-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3382 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/266/05266824.pdf [firstpage_image] =>[orig_patent_app_number] => 852064 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/852064
SOI semiconductor substrate Mar 15, 1992 Issued
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