Search

Anthony Bartis

Examiner (ID: 7244)

Most Active Art Unit
2106
Art Unit(s)
2103, 2106, 2305, 3404
Total Applications
791
Issued Applications
709
Pending Applications
1
Abandoned Applications
81

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2965859 [patent_doc_number] => 05243556 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-09-07 [patent_title] => 'Acoustic charge transport memory device' [patent_app_type] => 1 [patent_app_number] => 7/658825 [patent_app_country] => US [patent_app_date] => 1991-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2704 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/243/05243556.pdf [firstpage_image] =>[orig_patent_app_number] => 658825 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/658825
Acoustic charge transport memory device Feb 21, 1991 Issued
Array ( [id] => 2797978 [patent_doc_number] => 05142641 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-08-25 [patent_title] => 'CMOS structure for eliminating latch-up of parasitic thyristor' [patent_app_type] => 1 [patent_app_number] => 7/657380 [patent_app_country] => US [patent_app_date] => 1991-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4989 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 309 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/142/05142641.pdf [firstpage_image] =>[orig_patent_app_number] => 657380 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/657380
CMOS structure for eliminating latch-up of parasitic thyristor Feb 18, 1991 Issued
Array ( [id] => 2915756 [patent_doc_number] => 05227655 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-07-13 [patent_title] => 'Field effect transistor capable of easily adjusting switching speed thereof' [patent_app_type] => 1 [patent_app_number] => 7/656958 [patent_app_country] => US [patent_app_date] => 1991-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 1589 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/227/05227655.pdf [firstpage_image] =>[orig_patent_app_number] => 656958 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/656958
Field effect transistor capable of easily adjusting switching speed thereof Feb 14, 1991 Issued
Array ( [id] => 2942422 [patent_doc_number] => 05196916 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-03-23 [patent_title] => 'Highly purified metal material and sputtering target using the same' [patent_app_type] => 1 [patent_app_number] => 7/655950 [patent_app_country] => US [patent_app_date] => 1991-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6805 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/196/05196916.pdf [firstpage_image] =>[orig_patent_app_number] => 655950 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/655950
Highly purified metal material and sputtering target using the same Feb 14, 1991 Issued
Array ( [id] => 2794251 [patent_doc_number] => 05155562 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-13 [patent_title] => 'Semiconductor device equipped with a conductivity modulation MISFET' [patent_app_type] => 1 [patent_app_number] => 7/654882 [patent_app_country] => US [patent_app_date] => 1991-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 6866 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/155/05155562.pdf [firstpage_image] =>[orig_patent_app_number] => 654882 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/654882
Semiconductor device equipped with a conductivity modulation MISFET Feb 12, 1991 Issued
Array ( [id] => 2812628 [patent_doc_number] => 05148244 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-15 [patent_title] => 'Enhancement-FET and depletion-FET with different gate length formed in compound semiconductor substrate' [patent_app_type] => 1 [patent_app_number] => 7/653294 [patent_app_country] => US [patent_app_date] => 1991-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3559 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/148/05148244.pdf [firstpage_image] =>[orig_patent_app_number] => 653294 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/653294
Enhancement-FET and depletion-FET with different gate length formed in compound semiconductor substrate Feb 10, 1991 Issued
Array ( [id] => 2793839 [patent_doc_number] => 05130767 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-14 [patent_title] => 'Plural polygon source pattern for mosfet' [patent_app_type] => 1 [patent_app_number] => 7/653017 [patent_app_country] => US [patent_app_date] => 1991-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2335 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 380 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/130/05130767.pdf [firstpage_image] =>[orig_patent_app_number] => 653017 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/653017
Plural polygon source pattern for mosfet Feb 7, 1991 Issued
07/652154 ELECTROSTATIC DISCHARGE PROTECTION FOR INTEGRATED CIRCUITS Feb 6, 1991 Abandoned
Array ( [id] => 2942313 [patent_doc_number] => 05196910 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-03-23 [patent_title] => 'Semiconductor memory device with recessed array region' [patent_app_type] => 1 [patent_app_number] => 7/650999 [patent_app_country] => US [patent_app_date] => 1991-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 30 [patent_no_of_words] => 15959 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/196/05196910.pdf [firstpage_image] =>[orig_patent_app_number] => 650999 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/650999
Semiconductor memory device with recessed array region Feb 3, 1991 Issued
Array ( [id] => 2794435 [patent_doc_number] => 05155570 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-13 [patent_title] => 'Semiconductor integrated circuit having a pattern layout applicable to various custom ICs' [patent_app_type] => 1 [patent_app_number] => 7/675031 [patent_app_country] => US [patent_app_date] => 1991-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 6396 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/155/05155570.pdf [firstpage_image] =>[orig_patent_app_number] => 675031 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/675031
Semiconductor integrated circuit having a pattern layout applicable to various custom ICs Jan 24, 1991 Issued
Array ( [id] => 2783301 [patent_doc_number] => 05151759 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-29 [patent_title] => 'Fermi threshold silicon-on-insulator field effect transistor' [patent_app_type] => 1 [patent_app_number] => 7/646829 [patent_app_country] => US [patent_app_date] => 1991-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 58 [patent_no_of_words] => 17147 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/151/05151759.pdf [firstpage_image] =>[orig_patent_app_number] => 646829 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/646829
Fermi threshold silicon-on-insulator field effect transistor Jan 24, 1991 Issued
Array ( [id] => 2884429 [patent_doc_number] => 05185646 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-02-09 [patent_title] => 'Semiconductor device with improved current drivability' [patent_app_type] => 1 [patent_app_number] => 7/644510 [patent_app_country] => US [patent_app_date] => 1991-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 26 [patent_no_of_words] => 4669 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/185/05185646.pdf [firstpage_image] =>[orig_patent_app_number] => 644510 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/644510
Semiconductor device with improved current drivability Jan 22, 1991 Issued
07/644918 COMPOUNG SEMICONDUCTOR DEVICE HAVING GATE ELECTRODE SELF-ALIGNED TO SOURCE AND DRAIN ELECTRODES AND METHOD OF MANUFACTURING THE SAME Jan 22, 1991 Abandoned
Array ( [id] => 2859167 [patent_doc_number] => 05134448 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-28 [patent_title] => 'MOSFET with substrate source contact' [patent_app_type] => 1 [patent_app_number] => 7/643636 [patent_app_country] => US [patent_app_date] => 1991-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 22 [patent_no_of_words] => 5688 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/134/05134448.pdf [firstpage_image] =>[orig_patent_app_number] => 643636 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/643636
MOSFET with substrate source contact Jan 21, 1991 Issued
Array ( [id] => 2848499 [patent_doc_number] => 05172200 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-15 [patent_title] => 'MOS memory device having a LDD structure and a visor-like insulating layer' [patent_app_type] => 1 [patent_app_number] => 7/637428 [patent_app_country] => US [patent_app_date] => 1991-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 5553 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/172/05172200.pdf [firstpage_image] =>[orig_patent_app_number] => 637428 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/637428
MOS memory device having a LDD structure and a visor-like insulating layer Jan 3, 1991 Issued
07/635316 MIS DEVICE HAVING P CHANNEL MOS DEVICE AND N CHANNEL MOS DEVICE WITH LDD STRUCTURE AND MANUFACTURING METHOD THEREOF Jan 2, 1991 Abandoned
07/636660 MIS SEMICONDUCTOR DEVICE AND PRODUCTION METHOD Jan 1, 1991 Abandoned
Array ( [id] => 2867770 [patent_doc_number] => 05166768 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-11-24 [patent_title] => 'Compound semiconductor integrated circuit device with an element isolating region' [patent_app_type] => 1 [patent_app_number] => 7/631452 [patent_app_country] => US [patent_app_date] => 1990-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 2782 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/166/05166768.pdf [firstpage_image] =>[orig_patent_app_number] => 631452 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/631452
Compound semiconductor integrated circuit device with an element isolating region Dec 20, 1990 Issued
Array ( [id] => 2885012 [patent_doc_number] => 05159426 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-27 [patent_title] => 'Integrated circuit with improved battery protection' [patent_app_type] => 1 [patent_app_number] => 7/632223 [patent_app_country] => US [patent_app_date] => 1990-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 10033 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/159/05159426.pdf [firstpage_image] =>[orig_patent_app_number] => 632223 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/632223
Integrated circuit with improved battery protection Dec 19, 1990 Issued
Array ( [id] => 2980336 [patent_doc_number] => 05225701 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-07-06 [patent_title] => 'Vertical silicon-on-insulator (SOI) MOS type field effect transistor' [patent_app_type] => 1 [patent_app_number] => 7/626052 [patent_app_country] => US [patent_app_date] => 1990-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 5994 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/225/05225701.pdf [firstpage_image] =>[orig_patent_app_number] => 626052 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/626052
Vertical silicon-on-insulator (SOI) MOS type field effect transistor Dec 12, 1990 Issued
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