Anthony J Green

Array ( [id] => 8343056 [patent_doc_number] => 08244993 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-14 [patent_title] => 'Memory chain' [patent_app_type] => utility [patent_app_number] => 13/165206 [patent_app_country] => US [patent_app_date] => 2011-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 38 [patent_no_of_words] => 22274 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13165206 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7664951 [patent_doc_number] => 20110314220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-22 [patent_title] => 'STORAGE CONTROL APPARATUS, STORAGE SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 13/159853 [patent_app_country] => US [patent_app_date] => 2011-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 13279 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13159853 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8401348 [patent_doc_number] => 08271745 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-18 [patent_title] => 'Memory controller for non-homogeneous memory system' [patent_app_type] => utility [patent_app_number] => 13/149792 [patent_app_country] => US [patent_app_date] => 2011-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7795 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 13 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13149792 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6093880 [patent_doc_number] => 20110219196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-08 [patent_title] => 'MEMORY HUB WITH INTERNAL CACHE AND/OR MEMORY ACCESS PREDICTION' [patent_app_type] => utility [patent_app_number] => 13/108405 [patent_app_country] => US [patent_app_date] => 2011-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2995 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20110219196.pdf [firstpage_image] =>[orig_patent_app_number] => 13108405 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8201714 [patent_doc_number] => 20120124292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'Computer System Having Cache Subsystem Performing Demote Requests' [patent_app_type] => utility [patent_app_number] => 13/105235 [patent_app_country] => US [patent_app_date] => 2011-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2966 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20120124292.pdf [firstpage_image] =>[orig_patent_app_number] => 13105235 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6052133 [patent_doc_number] => 20110208907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'Protected Cache Architecture And Secure Programming Paradigm To Protect Applications' [patent_app_type] => utility [patent_app_number] => 13/099479 [patent_app_country] => US [patent_app_date] => 2011-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5047 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0208/20110208907.pdf [firstpage_image] =>[orig_patent_app_number] => 13099479 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8366587 [patent_doc_number] => 08255667 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-28 [patent_title] => 'System for managing memory' [patent_app_type] => utility [patent_app_number] => 13/096347 [patent_app_country] => US [patent_app_date] => 2011-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2614 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13096347 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6067413 [patent_doc_number] => 20110202712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-18 [patent_title] => 'STORAGE DEVICE INCLUDING FLASH MEMORY AND CAPABLE OF PREDICTING STORAGE DEVICE PERFORMANCE' [patent_app_type] => utility [patent_app_number] => 13/096731 [patent_app_country] => US [patent_app_date] => 2011-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 12788 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20110202712.pdf [firstpage_image] =>[orig_patent_app_number] => 13096731 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9282893 [patent_doc_number] => 20140032860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-30 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD FOR OPERATING SAME' [patent_app_type] => utility [patent_app_number] => 14/110786 [patent_app_country] => US [patent_app_date] => 2011-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 24513 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14110786 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9257702 [patent_doc_number] => 08621142 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-12-31 [patent_title] => 'Method and apparatus for achieving consistent read latency from an array of solid-state storage devices' [patent_app_type] => utility [patent_app_number] => 13/089035 [patent_app_country] => US [patent_app_date] => 2011-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7179 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13089035 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8022479 [patent_doc_number] => 08140755 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-20 [patent_title] => 'Computer system and process for transferring multiple high bandwidth streams of data between multiple storage units and multiple applications in a scalable and reliable manner' [patent_app_type] => utility [patent_app_number] => 13/070581 [patent_app_country] => US [patent_app_date] => 2011-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 17369 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/140/08140755.pdf [firstpage_image] =>[orig_patent_app_number] => 13070581 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8623235 [patent_doc_number] => 08356156 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-15 [patent_title] => 'Method and system for using external storage to amortize CPU cycle utilization' [patent_app_type] => utility [patent_app_number] => 13/037055 [patent_app_country] => US [patent_app_date] => 2011-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3390 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13037055 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9358503 [patent_doc_number] => 08677057 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-03-18 [patent_title] => 'Initiating memory wear leveling' [patent_app_type] => utility [patent_app_number] => 13/032073 [patent_app_country] => US [patent_app_date] => 2011-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6446 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13032073 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8552214 [patent_doc_number] => 08327112 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-04 [patent_title] => 'Processing system implementing variable page size memory organization using a multiple page per entry translation lookaside buffer' [patent_app_type] => utility [patent_app_number] => 13/018492 [patent_app_country] => US [patent_app_date] => 2011-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5356 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13018492 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6189192 [patent_doc_number] => 20110125958 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-26 [patent_title] => 'SEMICONDUCTOR MEMORY CARD ACCESS APPARATUS, A COMPUTER-READABLE RECORDING MEDIUM, AN INITIALIZATION METHOD, AND A SEMICONDUCTOR MEMORY CARD' [patent_app_type] => utility [patent_app_number] => 13/012978 [patent_app_country] => US [patent_app_date] => 2011-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 17537 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20110125958.pdf [firstpage_image] =>[orig_patent_app_number] => 13012978 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8319656 [patent_doc_number] => 08234449 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-31 [patent_title] => 'Storage subsystem that connects fibre channel and supports online backup' [patent_app_type] => utility [patent_app_number] => 13/004392 [patent_app_country] => US [patent_app_date] => 2011-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 6705 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13004392 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8235446 [patent_doc_number] => 08200901 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-06-12 [patent_title] => 'Managing cache memory in a parallel processing environment' [patent_app_type] => utility [patent_app_number] => 12/983368 [patent_app_country] => US [patent_app_date] => 2011-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 24 [patent_no_of_words] => 26384 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/200/08200901.pdf [firstpage_image] =>[orig_patent_app_number] => 12983368 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8022573 [patent_doc_number] => 08140805 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-20 [patent_title] => 'Memory component having write operation with multiple time periods' [patent_app_type] => utility [patent_app_number] => 12/975316 [patent_app_country] => US [patent_app_date] => 2010-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 16407 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/140/08140805.pdf [firstpage_image] =>[orig_patent_app_number] => 12975316 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6131394 [patent_doc_number] => 20110087928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-14 [patent_title] => 'SYSTEMS AND METHODS FOR MANAGING STALLED STORAGE DEVICES' [patent_app_type] => utility [patent_app_number] => 12/970795 [patent_app_country] => US [patent_app_date] => 2010-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 15232 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20110087928.pdf [firstpage_image] =>[orig_patent_app_number] => 12970795 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7520991 [patent_doc_number] => 07975099 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-05 [patent_title] => 'Data storage system including respective buffers for non-volatile memory and disc recording medium, and data access method thereof' [patent_app_type] => utility [patent_app_number] => 12/949936 [patent_app_country] => US [patent_app_date] => 2010-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2530 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/975/07975099.pdf [firstpage_image] =>[orig_patent_app_number] => 12949936 [rel_patent_id] =>[rel_patent_doc_number] =>)