Search

Anthony J Green

Examiner (ID: 130, Phone: (571)272-1367 , Office: P/1731 )

Most Active Art Unit
1731
Art Unit(s)
1754, 2899, 1108, 1793, 1731, 1755
Total Applications
4596
Issued Applications
3675
Pending Applications
315
Abandoned Applications
605

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6445075 [patent_doc_number] => 20100169606 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'PROCESSOR AND METHOD FOR USING AN INSTRUCTION HINT TO PREVENT HARDWARE PREFETCH FROM USING CERTAIN MEMORY ACCESSES IN PREFETCH CALCULATIONS' [patent_app_type] => utility [patent_app_number] => 12/346154 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5806 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20100169606.pdf [firstpage_image] =>[orig_patent_app_number] => 12346154 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/346154
Processor and method for using an instruction hint to prevent hardware prefetch from using certain memory accesses in prefetch calculations Dec 29, 2008 Issued
Array ( [id] => 9187028 [patent_doc_number] => 08627014 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-07 [patent_title] => 'Memory model for hardware attributes within a transactional memory system' [patent_app_type] => utility [patent_app_number] => 12/346539 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9706 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12346539 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/346539
Memory model for hardware attributes within a transactional memory system Dec 29, 2008 Issued
Array ( [id] => 6445046 [patent_doc_number] => 20100169605 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'ARBITRARY PRECISION FLOATING NUMBER PROCESSING' [patent_app_type] => utility [patent_app_number] => 12/346061 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5267 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20100169605.pdf [firstpage_image] =>[orig_patent_app_number] => 12346061 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/346061
Arbitrary precision floating number processing Dec 29, 2008 Issued
Array ( [id] => 9629888 [patent_doc_number] => 08799582 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-05 [patent_title] => 'Extending cache coherency protocols to support locally buffered data' [patent_app_type] => utility [patent_app_number] => 12/346543 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10729 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12346543 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/346543
Extending cache coherency protocols to support locally buffered data Dec 29, 2008 Issued
Array ( [id] => 6552838 [patent_doc_number] => 20100125713 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-20 [patent_title] => 'DATA BACKUP SYSTEM AND DATA BACKUP METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/346131 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4376 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20100125713.pdf [firstpage_image] =>[orig_patent_app_number] => 12346131 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/346131
DATA BACKUP SYSTEM AND DATA BACKUP METHOD THEREOF Dec 29, 2008 Abandoned
Array ( [id] => 6444774 [patent_doc_number] => 20100169588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'OPTIMIZED MEMORY MANAGEMENT FOR RANDOM AND SEQUENTIAL DATA WRITING' [patent_app_type] => utility [patent_app_number] => 12/346451 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6600 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20100169588.pdf [firstpage_image] =>[orig_patent_app_number] => 12346451 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/346451
Optimized memory management for random and sequential data writing Dec 29, 2008 Issued
Array ( [id] => 8331532 [patent_doc_number] => 08239613 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-07 [patent_title] => 'Hybrid memory device' [patent_app_type] => utility [patent_app_number] => 12/346567 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3227 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12346567 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/346567
Hybrid memory device Dec 29, 2008 Issued
Array ( [id] => 6444550 [patent_doc_number] => 20100169579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'READ AND WRITE MONITORING ATTRIBUTES IN TRANSACTIONAL MEMORY (TM) SYSTEMS' [patent_app_type] => utility [patent_app_number] => 12/346530 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10036 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20100169579.pdf [firstpage_image] =>[orig_patent_app_number] => 12346530 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/346530
Read and write monitoring attributes in transactional memory (TM) systems Dec 29, 2008 Issued
Array ( [id] => 6443805 [patent_doc_number] => 20100169542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'DYNAMIC MAPPING OF LOGICAL RANGES TO WRITE BLOCKS' [patent_app_type] => utility [patent_app_number] => 12/346433 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6123 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20100169542.pdf [firstpage_image] =>[orig_patent_app_number] => 12346433 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/346433
Dynamic mapping of logical ranges to write blocks Dec 29, 2008 Issued
Array ( [id] => 5437739 [patent_doc_number] => 20090172326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-02 [patent_title] => 'EMULATED STORAGE SYSTEM SUPPORTING INSTANT VOLUME RESTORE' [patent_app_type] => utility [patent_app_number] => 12/343281 [patent_app_country] => US [patent_app_date] => 2008-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 14514 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0172/20090172326.pdf [firstpage_image] =>[orig_patent_app_number] => 12343281 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/343281
EMULATED STORAGE SYSTEM SUPPORTING INSTANT VOLUME RESTORE Dec 22, 2008 Abandoned
Array ( [id] => 5576983 [patent_doc_number] => 20090144345 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-04 [patent_title] => 'SYSTEM AND ARTICLE OF MANUFACTURE FOR CONSISTENT COPYING OF STORAGE VOLUMES' [patent_app_type] => utility [patent_app_number] => 12/273885 [patent_app_country] => US [patent_app_date] => 2008-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5267 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0144/20090144345.pdf [firstpage_image] =>[orig_patent_app_number] => 12273885 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/273885
System and article of manufacture for consistent copying of storage volumes Nov 18, 2008 Issued
Array ( [id] => 4549202 [patent_doc_number] => 07925855 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-04-12 [patent_title] => 'Method and system for using external storage to amortize CPU cycle utilization' [patent_app_type] => utility [patent_app_number] => 12/259262 [patent_app_country] => US [patent_app_date] => 2008-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3541 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/925/07925855.pdf [firstpage_image] =>[orig_patent_app_number] => 12259262 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/259262
Method and system for using external storage to amortize CPU cycle utilization Oct 26, 2008 Issued
Array ( [id] => 5418096 [patent_doc_number] => 20090043983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-12 [patent_title] => 'METHOD AND APPARATUS FOR REDUCING THE AMOUNT OF DATA IN A STORAGE SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/254900 [patent_app_country] => US [patent_app_date] => 2008-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6400 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20090043983.pdf [firstpage_image] =>[orig_patent_app_number] => 12254900 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/254900
Method and apparatus for reducing the amount of data in a storage system Oct 20, 2008 Issued
Array ( [id] => 5523112 [patent_doc_number] => 20090031093 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-29 [patent_title] => 'Memory System and Method for Two Step Memory Write Operations' [patent_app_type] => utility [patent_app_number] => 12/242870 [patent_app_country] => US [patent_app_date] => 2008-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 16373 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20090031093.pdf [firstpage_image] =>[orig_patent_app_number] => 12242870 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/242870
Memory system and method for two step memory write operations Sep 29, 2008 Issued
Array ( [id] => 6383905 [patent_doc_number] => 20100077175 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-25 [patent_title] => 'Method of Enhancing Command Executing Performance of Disc Drive' [patent_app_type] => utility [patent_app_number] => 12/233603 [patent_app_country] => US [patent_app_date] => 2008-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7530 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20100077175.pdf [firstpage_image] =>[orig_patent_app_number] => 12233603 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/233603
Method of enhancing command executing performance of disc drive Sep 18, 2008 Issued
Array ( [id] => 6312492 [patent_doc_number] => 20100070714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-18 [patent_title] => 'Network On Chip With Caching Restrictions For Pages Of Computer Memory' [patent_app_type] => utility [patent_app_number] => 12/233180 [patent_app_country] => US [patent_app_date] => 2008-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9182 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20100070714.pdf [firstpage_image] =>[orig_patent_app_number] => 12233180 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/233180
Network on chip with caching restrictions for pages of computer memory Sep 17, 2008 Issued
Array ( [id] => 9302109 [patent_doc_number] => 08650352 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-11 [patent_title] => 'Systems and methods for determining logical values of coupled flash memory cells' [patent_app_type] => utility [patent_app_number] => 12/666520 [patent_app_country] => US [patent_app_date] => 2008-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 15977 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12666520 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/666520
Systems and methods for determining logical values of coupled flash memory cells Sep 16, 2008 Issued
Array ( [id] => 8667459 [patent_doc_number] => 08380932 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-02-19 [patent_title] => 'Contextual regeneration of pages for web-based applications' [patent_app_type] => utility [patent_app_number] => 12/212414 [patent_app_country] => US [patent_app_date] => 2008-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 16939 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12212414 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/212414
Contextual regeneration of pages for web-based applications Sep 16, 2008 Issued
Array ( [id] => 8536059 [patent_doc_number] => 08312222 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-11-13 [patent_title] => 'Event-driven regeneration of pages for web-based applications' [patent_app_type] => utility [patent_app_number] => 12/208934 [patent_app_country] => US [patent_app_date] => 2008-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8216 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12208934 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/208934
Event-driven regeneration of pages for web-based applications Sep 10, 2008 Issued
Array ( [id] => 8861446 [patent_doc_number] => 08463998 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-06-11 [patent_title] => 'System and method for managing page variations in a page delivery cache' [patent_app_type] => utility [patent_app_number] => 12/208072 [patent_app_country] => US [patent_app_date] => 2008-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 9008 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12208072 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/208072
System and method for managing page variations in a page delivery cache Sep 9, 2008 Issued
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