Search

Anthony J Green

Examiner (ID: 130, Phone: (571)272-1367 , Office: P/1731 )

Most Active Art Unit
1731
Art Unit(s)
1754, 2899, 1108, 1793, 1731, 1755
Total Applications
4596
Issued Applications
3675
Pending Applications
315
Abandoned Applications
605

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17157915 [patent_doc_number] => 20210318966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-14 [patent_title] => CRYPTOGRAPHIC PROTECTION OF MEMORY ATTACHED OVER INTERCONNECTS [patent_app_type] => utility [patent_app_number] => 17/358315 [patent_app_country] => US [patent_app_date] => 2021-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12472 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17358315 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/358315
Cryptographic protection of memory attached over interconnects Jun 24, 2021 Issued
Array ( [id] => 17128708 [patent_doc_number] => 20210303477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => MANAGEMENT OF DISTRIBUTED SHARED MEMORY [patent_app_type] => utility [patent_app_number] => 17/344763 [patent_app_country] => US [patent_app_date] => 2021-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11654 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17344763 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/344763
MANAGEMENT OF DISTRIBUTED SHARED MEMORY Jun 9, 2021 Pending
Array ( [id] => 17113779 [patent_doc_number] => 20210294376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => MEMORY SYSTEM WITH MULTIPLE CHANNEL INTERFACES AND METHOD OF OPERATING SAME [patent_app_type] => utility [patent_app_number] => 17/338320 [patent_app_country] => US [patent_app_date] => 2021-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10049 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17338320 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/338320
Memory system with multiple channel interfaces and method of operating same Jun 2, 2021 Issued
Array ( [id] => 19399333 [patent_doc_number] => 12073715 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-27 [patent_title] => Edge cloud system, server and cloud control platform [patent_app_type] => utility [patent_app_number] => 17/623860 [patent_app_country] => US [patent_app_date] => 2021-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4488 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17623860 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/623860
Edge cloud system, server and cloud control platform May 26, 2021 Issued
Array ( [id] => 17643968 [patent_doc_number] => 20220171706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => MEMORY SYSTEM AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/315942 [patent_app_country] => US [patent_app_date] => 2021-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10731 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17315942 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/315942
Memory system and operating method thereof May 9, 2021 Issued
Array ( [id] => 17172599 [patent_doc_number] => 20210326269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => SYSTEMS AND METHODS FOR TRANSFORMING LARGE DATA INTO A SMALLER REPRESENTATION AND FOR RE-TRANSFORMING THE SMALLER REPRESENTATION BACK TO THE ORIGINAL LARGE DATA [patent_app_type] => utility [patent_app_number] => 17/316050 [patent_app_country] => US [patent_app_date] => 2021-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14262 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17316050 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/316050
SYSTEMS AND METHODS FOR TRANSFORMING LARGE DATA INTO A SMALLER REPRESENTATION AND FOR RE-TRANSFORMING THE SMALLER REPRESENTATION BACK TO THE ORIGINAL LARGE DATA May 9, 2021 Abandoned
Array ( [id] => 18342778 [patent_doc_number] => 11640256 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-02 [patent_title] => Methods and systems for object level de-duplication for data storage system [patent_app_type] => utility [patent_app_number] => 17/315202 [patent_app_country] => US [patent_app_date] => 2021-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5114 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17315202 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/315202
Methods and systems for object level de-duplication for data storage system May 6, 2021 Issued
Array ( [id] => 17947952 [patent_doc_number] => 20220334971 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => Application of a Default Shared State Cache Coherency Protocol [patent_app_type] => utility [patent_app_number] => 17/230286 [patent_app_country] => US [patent_app_date] => 2021-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8873 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17230286 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/230286
Application of a default shared state cache coherency protocol Apr 13, 2021 Issued
Array ( [id] => 18046631 [patent_doc_number] => 11520585 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Prefetch store preallocation in an effective address-based cache directory [patent_app_type] => utility [patent_app_number] => 17/220115 [patent_app_country] => US [patent_app_date] => 2021-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6983 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17220115 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/220115
Prefetch store preallocation in an effective address-based cache directory Mar 31, 2021 Issued
Array ( [id] => 18734754 [patent_doc_number] => 11803485 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-31 [patent_title] => Microservice system with global context cache [patent_app_type] => utility [patent_app_number] => 17/198458 [patent_app_country] => US [patent_app_date] => 2021-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5568 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17198458 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/198458
Microservice system with global context cache Mar 10, 2021 Issued
Array ( [id] => 18400980 [patent_doc_number] => 11663118 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-30 [patent_title] => Address vectors for data storage elements [patent_app_type] => utility [patent_app_number] => 17/198003 [patent_app_country] => US [patent_app_date] => 2021-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 10882 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17198003 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/198003
Address vectors for data storage elements Mar 9, 2021 Issued
Array ( [id] => 18189438 [patent_doc_number] => 11580023 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-14 [patent_title] => Information processing apparatus, computer-readable recording medium having stored therein memory control program, and computer-readable recording medium having stored therein information processing program [patent_app_type] => utility [patent_app_number] => 17/189436 [patent_app_country] => US [patent_app_date] => 2021-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 14484 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17189436 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/189436
Information processing apparatus, computer-readable recording medium having stored therein memory control program, and computer-readable recording medium having stored therein information processing program Mar 1, 2021 Issued
Array ( [id] => 17475970 [patent_doc_number] => 20220083474 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => WRITE-BACK CACHE DEVICE [patent_app_type] => utility [patent_app_number] => 17/186192 [patent_app_country] => US [patent_app_date] => 2021-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6606 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17186192 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/186192
Write-back cache device Feb 25, 2021 Issued
Array ( [id] => 18291368 [patent_doc_number] => 11620238 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-04-04 [patent_title] => Hardware blinding of memory access with epoch transitions [patent_app_type] => utility [patent_app_number] => 17/185752 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 11481 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17185752 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/185752
Hardware blinding of memory access with epoch transitions Feb 24, 2021 Issued
Array ( [id] => 18414911 [patent_doc_number] => 11669453 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Data prefetching method and apparatus [patent_app_type] => utility [patent_app_number] => 17/182401 [patent_app_country] => US [patent_app_date] => 2021-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 23062 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 303 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17182401 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/182401
Data prefetching method and apparatus Feb 22, 2021 Issued
Array ( [id] => 17817318 [patent_doc_number] => 11422930 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-23 [patent_title] => Controller, memory system and data processing system [patent_app_type] => utility [patent_app_number] => 17/181328 [patent_app_country] => US [patent_app_date] => 2021-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 8756 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17181328 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/181328
Controller, memory system and data processing system Feb 21, 2021 Issued
Array ( [id] => 18949981 [patent_doc_number] => 11893277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-06 [patent_title] => Data storage device managing low endurance semiconductor memory write cache [patent_app_type] => utility [patent_app_number] => 17/180782 [patent_app_country] => US [patent_app_date] => 2021-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4033 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17180782 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/180782
Data storage device managing low endurance semiconductor memory write cache Feb 19, 2021 Issued
Array ( [id] => 16872111 [patent_doc_number] => 20210165578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => Operating Parameters for Non-Volatile Memory Devices [patent_app_type] => utility [patent_app_number] => 17/177102 [patent_app_country] => US [patent_app_date] => 2021-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5622 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17177102 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/177102
Operating parameters for non-volatile memory devices Feb 15, 2021 Issued
Array ( [id] => 16826256 [patent_doc_number] => 20210141549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-13 [patent_title] => MEMORY SYSTEM AND SOC INCLUDING LINEAR ADDRESS REMAPPING LOGIC [patent_app_type] => utility [patent_app_number] => 17/155503 [patent_app_country] => US [patent_app_date] => 2021-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7559 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17155503 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/155503
Memory system and SOC including linear address remapping logic Jan 21, 2021 Issued
Array ( [id] => 17737739 [patent_doc_number] => 20220223201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => Caching Techniques for Deep Learning Accelerator [patent_app_type] => utility [patent_app_number] => 17/146314 [patent_app_country] => US [patent_app_date] => 2021-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11883 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17146314 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/146314
Caching techniques for deep learning accelerator Jan 10, 2021 Issued
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