Search

Anthony J Green

Examiner (ID: 130, Phone: (571)272-1367 , Office: P/1731 )

Most Active Art Unit
1731
Art Unit(s)
1754, 2899, 1108, 1793, 1731, 1755
Total Applications
4596
Issued Applications
3675
Pending Applications
315
Abandoned Applications
605

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18861 [patent_doc_number] => 07809916 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-10-05 [patent_title] => 'Method for dynamically refining locks in resizable concurrent hashing' [patent_app_type] => utility [patent_app_number] => 11/863901 [patent_app_country] => US [patent_app_date] => 2007-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5072 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/809/07809916.pdf [firstpage_image] =>[orig_patent_app_number] => 11863901 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/863901
Method for dynamically refining locks in resizable concurrent hashing Sep 27, 2007 Issued
Array ( [id] => 4589493 [patent_doc_number] => 07861053 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-28 [patent_title] => 'Supporting un-buffered memory modules on a platform configured for registered memory modules' [patent_app_type] => utility [patent_app_number] => 11/863838 [patent_app_country] => US [patent_app_date] => 2007-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2012 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/861/07861053.pdf [firstpage_image] =>[orig_patent_app_number] => 11863838 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/863838
Supporting un-buffered memory modules on a platform configured for registered memory modules Sep 27, 2007 Issued
Array ( [id] => 4527545 [patent_doc_number] => 07934072 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-26 [patent_title] => 'Solid state storage reclamation apparatus and method' [patent_app_type] => utility [patent_app_number] => 11/864106 [patent_app_country] => US [patent_app_date] => 2007-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3464 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/934/07934072.pdf [firstpage_image] =>[orig_patent_app_number] => 11864106 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/864106
Solid state storage reclamation apparatus and method Sep 27, 2007 Issued
Array ( [id] => 5430200 [patent_doc_number] => 20090089510 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-02 [patent_title] => 'SPECULATIVE READ IN A CACHE COHERENT MICROPROCESSOR' [patent_app_type] => utility [patent_app_number] => 11/864363 [patent_app_country] => US [patent_app_date] => 2007-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7621 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20090089510.pdf [firstpage_image] =>[orig_patent_app_number] => 11864363 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/864363
SPECULATIVE READ IN A CACHE COHERENT MICROPROCESSOR Sep 27, 2007 Abandoned
Array ( [id] => 8558127 [patent_doc_number] => 08332613 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-12-11 [patent_title] => 'Methods and systems for managing I/O requests to minimize disruption required for data encapsulation and de-encapsulation' [patent_app_type] => utility [patent_app_number] => 11/863745 [patent_app_country] => US [patent_app_date] => 2007-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8060 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11863745 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/863745
Methods and systems for managing I/O requests to minimize disruption required for data encapsulation and de-encapsulation Sep 27, 2007 Issued
Array ( [id] => 5430185 [patent_doc_number] => 20090089495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-02 [patent_title] => 'NON-BLOCKING VARIABLE SIZE RECYCLABLE BUFFER MANAGEMENT' [patent_app_type] => utility [patent_app_number] => 11/864211 [patent_app_country] => US [patent_app_date] => 2007-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4373 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20090089495.pdf [firstpage_image] =>[orig_patent_app_number] => 11864211 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/864211
Non-blocking variable size recyclable buffer management Sep 27, 2007 Issued
Array ( [id] => 7972021 [patent_doc_number] => 07941588 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-10 [patent_title] => 'Multi-level nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/864074 [patent_app_country] => US [patent_app_date] => 2007-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8616 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/941/07941588.pdf [firstpage_image] =>[orig_patent_app_number] => 11864074 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/864074
Multi-level nonvolatile semiconductor memory device Sep 27, 2007 Issued
Array ( [id] => 8758 [patent_doc_number] => 07818532 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-19 [patent_title] => 'Method and system for creating and restoring an image file' [patent_app_type] => utility [patent_app_number] => 11/862910 [patent_app_country] => US [patent_app_date] => 2007-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7563 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/818/07818532.pdf [firstpage_image] =>[orig_patent_app_number] => 11862910 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/862910
Method and system for creating and restoring an image file Sep 26, 2007 Issued
Array ( [id] => 5454508 [patent_doc_number] => 20090070545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-12 [patent_title] => 'PROCESSING SYSTEM IMPLEMENTING VARIABLE PAGE SIZE MEMORY ORGANIZATION USING A MULTIPLE PAGE PER ENTRY TRANSLATION LOOKASIDE BUFFER' [patent_app_type] => utility [patent_app_number] => 11/853451 [patent_app_country] => US [patent_app_date] => 2007-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5278 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20090070545.pdf [firstpage_image] =>[orig_patent_app_number] => 11853451 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/853451
Processing system implementing variable page size memory organization using a multiple page per entry translation lookaside buffer Sep 10, 2007 Issued
Array ( [id] => 5200720 [patent_doc_number] => 20070300038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-27 [patent_title] => 'Memory Controller for Non-Homogeneous Memory System' [patent_app_type] => utility [patent_app_number] => 11/852996 [patent_app_country] => US [patent_app_date] => 2007-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7725 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0300/20070300038.pdf [firstpage_image] =>[orig_patent_app_number] => 11852996 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/852996
Memory controller for non-homogeneous memory system Sep 9, 2007 Issued
Array ( [id] => 4671559 [patent_doc_number] => 20080046620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-21 [patent_title] => 'Handling of the Transmit Enable Signal in a Dynamic Random Access Memory Controller' [patent_app_type] => utility [patent_app_number] => 11/849548 [patent_app_country] => US [patent_app_date] => 2007-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2970 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20080046620.pdf [firstpage_image] =>[orig_patent_app_number] => 11849548 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/849548
Handling of the transmit enable signal in a dynamic random access memory controller Sep 3, 2007 Issued
Array ( [id] => 5232392 [patent_doc_number] => 20070294501 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-20 [patent_title] => 'Cooperative memory management' [patent_app_type] => utility [patent_app_number] => 11/894434 [patent_app_country] => US [patent_app_date] => 2007-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4586 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20070294501.pdf [firstpage_image] =>[orig_patent_app_number] => 11894434 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/894434
Cooperative memory management allowing program request and release memory as needed Aug 19, 2007 Issued
Array ( [id] => 146495 [patent_doc_number] => 07689783 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-30 [patent_title] => 'System and method for sharing memory by heterogeneous processors' [patent_app_type] => utility [patent_app_number] => 11/840284 [patent_app_country] => US [patent_app_date] => 2007-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 50 [patent_figures_cnt] => 59 [patent_no_of_words] => 17463 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/689/07689783.pdf [firstpage_image] =>[orig_patent_app_number] => 11840284 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/840284
System and method for sharing memory by heterogeneous processors Aug 16, 2007 Issued
Array ( [id] => 7756396 [patent_doc_number] => 08112575 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-07 [patent_title] => 'Memory controller, nonvolatile memory device, access device, and nonvolatile memory system' [patent_app_type] => utility [patent_app_number] => 12/376153 [patent_app_country] => US [patent_app_date] => 2007-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 9115 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/112/08112575.pdf [firstpage_image] =>[orig_patent_app_number] => 12376153 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/376153
Memory controller, nonvolatile memory device, access device, and nonvolatile memory system Jul 31, 2007 Issued
Array ( [id] => 4940617 [patent_doc_number] => 20080077937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-27 [patent_title] => 'MULTIPATH ACCESSIBLE SEMICONDUCTOR MEMORY DEVICE WITH HOST INTERFACE BETWEEN PROCESSORS' [patent_app_type] => utility [patent_app_number] => 11/829859 [patent_app_country] => US [patent_app_date] => 2007-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11354 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20080077937.pdf [firstpage_image] =>[orig_patent_app_number] => 11829859 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/829859
Multipath accessible semiconductor memory device with host interface between processors Jul 26, 2007 Issued
Array ( [id] => 18808 [patent_doc_number] => 07809889 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-05 [patent_title] => 'High performance multilevel cache hierarchy' [patent_app_type] => utility [patent_app_number] => 11/779784 [patent_app_country] => US [patent_app_date] => 2007-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4745 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 14 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/809/07809889.pdf [firstpage_image] =>[orig_patent_app_number] => 11779784 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/779784
High performance multilevel cache hierarchy Jul 17, 2007 Issued
Array ( [id] => 5292094 [patent_doc_number] => 20090024824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-22 [patent_title] => 'PROCESSING SYSTEM HAVING A SUPPORTED PAGE SIZE INFORMATION REGISTER' [patent_app_type] => utility [patent_app_number] => 11/779853 [patent_app_country] => US [patent_app_date] => 2007-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5114 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20090024824.pdf [firstpage_image] =>[orig_patent_app_number] => 11779853 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/779853
Processing system having a supported page size information register Jul 17, 2007 Issued
Array ( [id] => 156175 [patent_doc_number] => 07680977 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-16 [patent_title] => 'Page and block management algorithm for NAND flash' [patent_app_type] => utility [patent_app_number] => 11/779804 [patent_app_country] => US [patent_app_date] => 2007-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 7285 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/680/07680977.pdf [firstpage_image] =>[orig_patent_app_number] => 11779804 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/779804
Page and block management algorithm for NAND flash Jul 17, 2007 Issued
Array ( [id] => 4646901 [patent_doc_number] => 08024514 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-20 [patent_title] => 'Access control management' [patent_app_type] => utility [patent_app_number] => 11/879399 [patent_app_country] => US [patent_app_date] => 2007-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6297 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/024/08024514.pdf [firstpage_image] =>[orig_patent_app_number] => 11879399 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/879399
Access control management Jul 16, 2007 Issued
Array ( [id] => 4530365 [patent_doc_number] => 07913054 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'Digital electronic device capable of memory formatting, a method of memory formatting, digital electronic device having a function of storing and method for storing thereof' [patent_app_type] => utility [patent_app_number] => 11/777310 [patent_app_country] => US [patent_app_date] => 2007-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 7803 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/913/07913054.pdf [firstpage_image] =>[orig_patent_app_number] => 11777310 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/777310
Digital electronic device capable of memory formatting, a method of memory formatting, digital electronic device having a function of storing and method for storing thereof Jul 12, 2007 Issued
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