Anthony J Green

Array ( [id] => 4868914 [patent_doc_number] => 20080147973 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-19 [patent_title] => 'Provisioning storage' [patent_app_type] => utility [patent_app_number] => 11/641148 [patent_app_country] => US [patent_app_date] => 2006-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2659 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20080147973.pdf [firstpage_image] =>[orig_patent_app_number] => 11641148 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 156190 [patent_doc_number] => 07680992 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-03-16 [patent_title] => 'Read-modify-write memory with low latency for critical requests' [patent_app_type] => utility [patent_app_number] => 11/613142 [patent_app_country] => US [patent_app_date] => 2006-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2374 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/680/07680992.pdf [firstpage_image] =>[orig_patent_app_number] => 11613142 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5232361 [patent_doc_number] => 20070294470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-20 [patent_title] => 'MEMORY INTERFACE WITH INDEPENDENT ARBITRATION OF PRECHARGE, ACTIVATE, AND READ/WRITE' [patent_app_type] => utility [patent_app_number] => 11/613120 [patent_app_country] => US [patent_app_date] => 2006-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3252 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20070294470.pdf [firstpage_image] =>[orig_patent_app_number] => 11613120 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7690073 [patent_doc_number] => 20070233960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'Command processing apparatus and command processing method' [patent_app_type] => utility [patent_app_number] => 11/640926 [patent_app_country] => US [patent_app_date] => 2006-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5006 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0233/20070233960.pdf [firstpage_image] =>[orig_patent_app_number] => 11640926 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5036539 [patent_doc_number] => 20070101078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-03 [patent_title] => 'Storage apparatus' [patent_app_type] => utility [patent_app_number] => 11/640240 [patent_app_country] => US [patent_app_date] => 2006-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9844 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0101/20070101078.pdf [firstpage_image] =>[orig_patent_app_number] => 11640240 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9275945 [patent_doc_number] => 08639892 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-01-28 [patent_title] => 'Selectively inhibit page usage bit updates' [patent_app_type] => utility [patent_app_number] => 11/611801 [patent_app_country] => US [patent_app_date] => 2006-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 6879 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11611801 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9062783 [patent_doc_number] => 08549236 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-01 [patent_title] => 'Storage subsystem with multiple non-volatile memory arrays to protect against data losses' [patent_app_type] => utility [patent_app_number] => 11/611705 [patent_app_country] => US [patent_app_date] => 2006-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4373 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 422 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11611705 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4787584 [patent_doc_number] => 20080140913 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-12 [patent_title] => 'Storage Device With 1394 Interface' [patent_app_type] => utility [patent_app_number] => 11/567745 [patent_app_country] => US [patent_app_date] => 2006-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1910 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20080140913.pdf [firstpage_image] =>[orig_patent_app_number] => 11567745 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4659292 [patent_doc_number] => 20080028154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-31 [patent_title] => 'Method and Apparatus for Memory Utilization' [patent_app_type] => utility [patent_app_number] => 11/567874 [patent_app_country] => US [patent_app_date] => 2006-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 12342 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20080028154.pdf [firstpage_image] =>[orig_patent_app_number] => 11567874 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 79381 [patent_doc_number] => 07752413 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-06 [patent_title] => 'Method and apparatus for communicating between threads' [patent_app_type] => utility [patent_app_number] => 11/567882 [patent_app_country] => US [patent_app_date] => 2006-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 12293 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/752/07752413.pdf [firstpage_image] =>[orig_patent_app_number] => 11567882 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10536654 [patent_doc_number] => 09262284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-16 [patent_title] => 'Single channel memory mirror' [patent_app_type] => utility [patent_app_number] => 11/567964 [patent_app_country] => US [patent_app_date] => 2006-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2675 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11567964 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4804717 [patent_doc_number] => 20080016306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-17 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE HAVING RAM AND ROM AREAS' [patent_app_type] => utility [patent_app_number] => 11/567844 [patent_app_country] => US [patent_app_date] => 2006-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6811 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20080016306.pdf [firstpage_image] =>[orig_patent_app_number] => 11567844 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5185816 [patent_doc_number] => 20070164122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-19 [patent_title] => 'CONTACTLESS CARD AND CONTACTLESS CARD SYSTEM' [patent_app_type] => utility [patent_app_number] => 11/567856 [patent_app_country] => US [patent_app_date] => 2006-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3486 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20070164122.pdf [firstpage_image] =>[orig_patent_app_number] => 11567856 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 234727 [patent_doc_number] => 07600071 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-06 [patent_title] => 'Circuit having relaxed setup time via reciprocal clock and data gating' [patent_app_type] => utility [patent_app_number] => 11/567941 [patent_app_country] => US [patent_app_date] => 2006-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3349 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/600/07600071.pdf [firstpage_image] =>[orig_patent_app_number] => 11567941 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 208438 [patent_doc_number] => 07631147 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-08 [patent_title] => 'Efficient flushing of translation lookaside buffers in a multiprocessor environment' [patent_app_type] => utility [patent_app_number] => 11/635105 [patent_app_country] => US [patent_app_date] => 2006-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6350 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/631/07631147.pdf [firstpage_image] =>[orig_patent_app_number] => 11635105 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4787606 [patent_doc_number] => 20080140935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-12 [patent_title] => 'Efficient marking of shared cache lines' [patent_app_type] => utility [patent_app_number] => 11/635270 [patent_app_country] => US [patent_app_date] => 2006-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4565 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20080140935.pdf [firstpage_image] =>[orig_patent_app_number] => 11635270 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 237670 [patent_doc_number] => 07596659 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-29 [patent_title] => 'Method and system for balanced striping of objects' [patent_app_type] => utility [patent_app_number] => 11/634674 [patent_app_country] => US [patent_app_date] => 2006-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2869 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/596/07596659.pdf [firstpage_image] =>[orig_patent_app_number] => 11634674 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5024673 [patent_doc_number] => 20070150640 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-28 [patent_title] => 'Variable size cache memory support within an integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/634253 [patent_app_country] => US [patent_app_date] => 2006-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2585 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20070150640.pdf [firstpage_image] =>[orig_patent_app_number] => 11634253 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5195239 [patent_doc_number] => 20070083724 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-12 [patent_title] => 'Assuring genuineness of data stored on a storage device' [patent_app_type] => utility [patent_app_number] => 11/635249 [patent_app_country] => US [patent_app_date] => 2006-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6668 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20070083724.pdf [firstpage_image] =>[orig_patent_app_number] => 11635249 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 38186 [patent_doc_number] => 07788457 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-31 [patent_title] => 'Method of controlling storage device controlling apparatus, and storage device controlling apparatus' [patent_app_type] => utility [patent_app_number] => 11/599222 [patent_app_country] => US [patent_app_date] => 2006-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 30 [patent_no_of_words] => 14296 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/788/07788457.pdf [firstpage_image] =>[orig_patent_app_number] => 11599222 [rel_patent_id] =>[rel_patent_doc_number] =>)