Search

Anthony J Green

Examiner (ID: 130, Phone: (571)272-1367 , Office: P/1731 )

Most Active Art Unit
1731
Art Unit(s)
1754, 2899, 1108, 1793, 1731, 1755
Total Applications
4596
Issued Applications
3675
Pending Applications
315
Abandoned Applications
605

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7174900 [patent_doc_number] => 20040078643 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-22 [patent_title] => 'System and method for implementing advanced RAID using a set of unique matrices as coefficients' [patent_app_type] => new [patent_app_number] => 10/272070 [patent_app_country] => US [patent_app_date] => 2002-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8978 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20040078643.pdf [firstpage_image] =>[orig_patent_app_number] => 10272070 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/272070
System and method for implementing advanced RAID using a set of unique matrices as coefficients Oct 15, 2002 Issued
Array ( [id] => 953293 [patent_doc_number] => 06961821 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-01 [patent_title] => 'Reconfigurable cache controller for nonuniform memory access computer systems' [patent_app_type] => utility [patent_app_number] => 10/272032 [patent_app_country] => US [patent_app_date] => 2002-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5717 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/961/06961821.pdf [firstpage_image] =>[orig_patent_app_number] => 10272032 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/272032
Reconfigurable cache controller for nonuniform memory access computer systems Oct 15, 2002 Issued
Array ( [id] => 933331 [patent_doc_number] => 06981102 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-27 [patent_title] => 'Method and system for managing meta data' [patent_app_type] => utility [patent_app_number] => 10/269507 [patent_app_country] => US [patent_app_date] => 2002-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 10008 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 18 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/981/06981102.pdf [firstpage_image] =>[orig_patent_app_number] => 10269507 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/269507
Method and system for managing meta data Oct 10, 2002 Issued
10/111938 Bus system for simultaneous handling of various memory access procedure with a system-on-chip solution Oct 7, 2002 Abandoned
Array ( [id] => 984638 [patent_doc_number] => 06928528 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-08-09 [patent_title] => 'Guaranteed data synchronization' [patent_app_type] => utility [patent_app_number] => 10/266118 [patent_app_country] => US [patent_app_date] => 2002-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8226 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/928/06928528.pdf [firstpage_image] =>[orig_patent_app_number] => 10266118 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/266118
Guaranteed data synchronization Oct 6, 2002 Issued
Array ( [id] => 1066733 [patent_doc_number] => 06851033 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-01 [patent_title] => 'Memory access prediction in a data processing apparatus' [patent_app_type] => utility [patent_app_number] => 10/260545 [patent_app_country] => US [patent_app_date] => 2002-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 9461 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/851/06851033.pdf [firstpage_image] =>[orig_patent_app_number] => 10260545 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/260545
Memory access prediction in a data processing apparatus Sep 30, 2002 Issued
Array ( [id] => 1052575 [patent_doc_number] => 06862655 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-01 [patent_title] => 'Wide word search using serial match line computation in content addressable memory' [patent_app_type] => utility [patent_app_number] => 10/263112 [patent_app_country] => US [patent_app_date] => 2002-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 10656 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/862/06862655.pdf [firstpage_image] =>[orig_patent_app_number] => 10263112 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/263112
Wide word search using serial match line computation in content addressable memory Sep 30, 2002 Issued
Array ( [id] => 736060 [patent_doc_number] => 07043606 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-09 [patent_title] => 'Automatic browser web cache resizing system' [patent_app_type] => utility [patent_app_number] => 10/262110 [patent_app_country] => US [patent_app_date] => 2002-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2638 [patent_no_of_claims] => 118 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/043/07043606.pdf [firstpage_image] =>[orig_patent_app_number] => 10262110 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/262110
Automatic browser web cache resizing system Sep 30, 2002 Issued
Array ( [id] => 6736952 [patent_doc_number] => 20030014587 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-16 [patent_title] => 'Intelligent backplane for serial storage architectures method and system' [patent_app_type] => new [patent_app_number] => 10/238139 [patent_app_country] => US [patent_app_date] => 2002-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6446 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20030014587.pdf [firstpage_image] =>[orig_patent_app_number] => 10238139 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/238139
Intelligent backplane for serial storage architectures method and system Sep 9, 2002 Issued
Array ( [id] => 752933 [patent_doc_number] => 07028135 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-11 [patent_title] => 'Multiple partition memory command user interface' [patent_app_type] => utility [patent_app_number] => 10/229924 [patent_app_country] => US [patent_app_date] => 2002-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2622 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/028/07028135.pdf [firstpage_image] =>[orig_patent_app_number] => 10229924 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/229924
Multiple partition memory command user interface Aug 27, 2002 Issued
Array ( [id] => 6780037 [patent_doc_number] => 20030051119 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-13 [patent_title] => 'Scheme for implementing breakpoints for on-chip ROM code patching' [patent_app_type] => new [patent_app_number] => 10/229674 [patent_app_country] => US [patent_app_date] => 2002-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6171 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20030051119.pdf [firstpage_image] =>[orig_patent_app_number] => 10229674 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/229674
Scheme for implementing breakpoints for on-chip ROM code patching Aug 27, 2002 Issued
Array ( [id] => 731034 [patent_doc_number] => 07047352 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-16 [patent_title] => 'Fail-safe method of updating a multiple FPGA configuration data storage system' [patent_app_type] => utility [patent_app_number] => 10/230920 [patent_app_country] => US [patent_app_date] => 2002-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3129 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/047/07047352.pdf [firstpage_image] =>[orig_patent_app_number] => 10230920 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/230920
Fail-safe method of updating a multiple FPGA configuration data storage system Aug 27, 2002 Issued
Array ( [id] => 7138438 [patent_doc_number] => 20040044850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'Method and apparatus for the synchronization of distributed caches' [patent_app_type] => new [patent_app_number] => 10/231414 [patent_app_country] => US [patent_app_date] => 2002-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6261 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20040044850.pdf [firstpage_image] =>[orig_patent_app_number] => 10231414 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/231414
Method and apparatus for the synchronization of distributed caches Aug 27, 2002 Issued
Array ( [id] => 6656249 [patent_doc_number] => 20030009645 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-09 [patent_title] => 'Data storage device providing communication between processing units' [patent_app_type] => new [patent_app_number] => 10/225311 [patent_app_country] => US [patent_app_date] => 2002-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5732 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20030009645.pdf [firstpage_image] =>[orig_patent_app_number] => 10225311 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/225311
Data storage device providing communication between processing units Aug 19, 2002 Issued
Array ( [id] => 7393831 [patent_doc_number] => 20040030845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-12 [patent_title] => 'Apparatus and methods for sharing cache among processors' [patent_app_type] => new [patent_app_number] => 10/217068 [patent_app_country] => US [patent_app_date] => 2002-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6041 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20040030845.pdf [firstpage_image] =>[orig_patent_app_number] => 10217068 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/217068
Apparatus and methods for sharing cache among processors Aug 11, 2002 Issued
Array ( [id] => 6647571 [patent_doc_number] => 20030212859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-13 [patent_title] => 'Arrayed data storage architecture with simultaneous command of multiple storage media' [patent_app_type] => new [patent_app_number] => 10/217167 [patent_app_country] => US [patent_app_date] => 2002-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 14490 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20030212859.pdf [firstpage_image] =>[orig_patent_app_number] => 10217167 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/217167
Arrayed data storage architecture with simultaneous command of multiple storage media Aug 11, 2002 Abandoned
Array ( [id] => 7613849 [patent_doc_number] => 06898682 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-24 [patent_title] => 'Automatic READ latency calculation without software intervention for a source-synchronous interface' [patent_app_type] => utility [patent_app_number] => 10/217174 [patent_app_country] => US [patent_app_date] => 2002-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8545 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/898/06898682.pdf [firstpage_image] =>[orig_patent_app_number] => 10217174 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/217174
Automatic READ latency calculation without software intervention for a source-synchronous interface Aug 11, 2002 Issued
Array ( [id] => 6460407 [patent_doc_number] => 20020178331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-28 [patent_title] => 'Prestaging data into cache in preparation for data transfer operations' [patent_app_type] => new [patent_app_number] => 10/194204 [patent_app_country] => US [patent_app_date] => 2002-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7942 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20020178331.pdf [firstpage_image] =>[orig_patent_app_number] => 10194204 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/194204
Prestaging data into cache in preparation for data transfer operations Jul 11, 2002 Issued
Array ( [id] => 1177475 [patent_doc_number] => 06760808 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-06 [patent_title] => 'Computer system and process for transferring multiple high bandwidth streams of data between multiple storage units and multiple applications in a scalable and reliable manner' [patent_app_type] => B2 [patent_app_number] => 10/186929 [patent_app_country] => US [patent_app_date] => 2002-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 17201 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/760/06760808.pdf [firstpage_image] =>[orig_patent_app_number] => 10186929 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/186929
Computer system and process for transferring multiple high bandwidth streams of data between multiple storage units and multiple applications in a scalable and reliable manner Jun 30, 2002 Issued
Array ( [id] => 404189 [patent_doc_number] => 07293150 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-06 [patent_title] => 'Method and system for creating and restoring an image file' [patent_app_type] => utility [patent_app_number] => 10/185755 [patent_app_country] => US [patent_app_date] => 2002-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7578 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/293/07293150.pdf [firstpage_image] =>[orig_patent_app_number] => 10185755 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/185755
Method and system for creating and restoring an image file Jun 27, 2002 Issued
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