Anthony J Green
Examiner (ID: 130, Phone: (571)272-1367 , Office: P/1731 )
Most Active Art Unit | 1731 |
Art Unit(s) | 1754, 2899, 1108, 1793, 1731, 1755 |
Total Applications | 4596 |
Issued Applications | 3675 |
Pending Applications | 315 |
Abandoned Applications | 605 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 6826324
[patent_doc_number] => 20030236946
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-12-25
[patent_title] => 'Managed queues'
[patent_app_type] => new
[patent_app_number] => 10/176362
[patent_app_country] => US
[patent_app_date] => 2002-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5170
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0236/20030236946.pdf
[firstpage_image] =>[orig_patent_app_number] => 10176362
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/176362 | Managed queues | Jun 19, 2002 | Abandoned |
Array
(
[id] => 6826197
[patent_doc_number] => 20030236819
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-12-25
[patent_title] => 'Queue-based data retrieval and transmission'
[patent_app_type] => new
[patent_app_number] => 10/176092
[patent_app_country] => US
[patent_app_date] => 2002-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 12106
[patent_no_of_claims] => 52
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0236/20030236819.pdf
[firstpage_image] =>[orig_patent_app_number] => 10176092
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/176092 | Queue-based data retrieval and transmission | Jun 19, 2002 | Abandoned |
Array
(
[id] => 6679629
[patent_doc_number] => 20030229770
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-12-11
[patent_title] => 'Memory hub with internal cache and/or memory access prediction'
[patent_app_type] => new
[patent_app_number] => 10/165787
[patent_app_country] => US
[patent_app_date] => 2002-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2888
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0229/20030229770.pdf
[firstpage_image] =>[orig_patent_app_number] => 10165787
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/165787 | Memory hub with internal cache and/or memory access prediction | Jun 6, 2002 | Issued |
10/049064 | Call out memory with reduced surface | Jun 2, 2002 | Abandoned |
Array
(
[id] => 6703080
[patent_doc_number] => 20030225960
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-12-04
[patent_title] => 'Method for partitioning memory mass storage device'
[patent_app_type] => new
[patent_app_number] => 10/160519
[patent_app_country] => US
[patent_app_date] => 2002-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 3700
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 46
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0225/20030225960.pdf
[firstpage_image] =>[orig_patent_app_number] => 10160519
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/160519 | Method for partitioning memory mass storage device | May 31, 2002 | Issued |
Array
(
[id] => 1149546
[patent_doc_number] => 06782449
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-08-24
[patent_title] => 'Adaptively modifying a read caching algorithm based upon the detection of a vibration state within a rotating media storage device'
[patent_app_type] => B1
[patent_app_number] => 10/160752
[patent_app_country] => US
[patent_app_date] => 2002-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6286
[patent_no_of_claims] => 50
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/782/06782449.pdf
[firstpage_image] =>[orig_patent_app_number] => 10160752
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/160752 | Adaptively modifying a read caching algorithm based upon the detection of a vibration state within a rotating media storage device | May 31, 2002 | Issued |
Array
(
[id] => 6703079
[patent_doc_number] => 20030225959
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-12-04
[patent_title] => 'Synchronous memory open page register'
[patent_app_type] => new
[patent_app_number] => 10/159141
[patent_app_country] => US
[patent_app_date] => 2002-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2968
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 29
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0225/20030225959.pdf
[firstpage_image] =>[orig_patent_app_number] => 10159141
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/159141 | Synchronous memory open page register | May 28, 2002 | Issued |
Array
(
[id] => 943547
[patent_doc_number] => 06970986
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-11-29
[patent_title] => 'Software based system and method for I/O chip hiding of processor based controllers from operating system'
[patent_app_type] => utility
[patent_app_number] => 10/153549
[patent_app_country] => US
[patent_app_date] => 2002-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6566
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/970/06970986.pdf
[firstpage_image] =>[orig_patent_app_number] => 10153549
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/153549 | Software based system and method for I/O chip hiding of processor based controllers from operating system | May 20, 2002 | Issued |
Array
(
[id] => 1143489
[patent_doc_number] => 06785768
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-08-31
[patent_title] => 'Computer system and process for transferring streams of data between multiple storage units and multiple applications in a scalable and reliable manner'
[patent_app_type] => B2
[patent_app_number] => 10/145495
[patent_app_country] => US
[patent_app_date] => 2002-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 27
[patent_no_of_words] => 20518
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 245
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/785/06785768.pdf
[firstpage_image] =>[orig_patent_app_number] => 10145495
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/145495 | Computer system and process for transferring streams of data between multiple storage units and multiple applications in a scalable and reliable manner | May 13, 2002 | Issued |
Array
(
[id] => 6561083
[patent_doc_number] => 20020138695
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-26
[patent_title] => 'Method and system for recovery of meta data in a storage controller'
[patent_app_type] => new
[patent_app_number] => 10/143119
[patent_app_country] => US
[patent_app_date] => 2002-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 9810
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 5
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0138/20020138695.pdf
[firstpage_image] =>[orig_patent_app_number] => 10143119
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/143119 | Method and system for recovery of meta data in a storage controller | May 8, 2002 | Issued |
Array
(
[id] => 1043155
[patent_doc_number] => 06871256
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-03-22
[patent_title] => 'Method and arrangement in a stack having a memory segmented into data groups having a plurality of elements'
[patent_app_type] => utility
[patent_app_number] => 10/137781
[patent_app_country] => US
[patent_app_date] => 2002-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 3381
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 204
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/871/06871256.pdf
[firstpage_image] =>[orig_patent_app_number] => 10137781
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/137781 | Method and arrangement in a stack having a memory segmented into data groups having a plurality of elements | May 1, 2002 | Issued |
Array
(
[id] => 978703
[patent_doc_number] => 06934801
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-08-23
[patent_title] => 'Disk device having cache memory'
[patent_app_type] => utility
[patent_app_number] => 10/136314
[patent_app_country] => US
[patent_app_date] => 2002-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2800
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/934/06934801.pdf
[firstpage_image] =>[orig_patent_app_number] => 10136314
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/136314 | Disk device having cache memory | May 1, 2002 | Issued |
Array
(
[id] => 6726353
[patent_doc_number] => 20030208665
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-11-06
[patent_title] => 'Reducing data speculation penalty with early cache hit/miss prediction'
[patent_app_type] => new
[patent_app_number] => 10/138039
[patent_app_country] => US
[patent_app_date] => 2002-05-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 2404
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[patent_no_of_ind_claims] => 4
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0208/20030208665.pdf
[firstpage_image] =>[orig_patent_app_number] => 10138039
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/138039 | Reducing data speculation penalty with early cache hit/miss prediction | Apr 30, 2002 | Abandoned |
Array
(
[id] => 1020907
[patent_doc_number] => 06892272
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-05-10
[patent_title] => 'Method and apparatus for determining a longest prefix match in a content addressable memory device'
[patent_app_type] => utility
[patent_app_number] => 10/131370
[patent_app_country] => US
[patent_app_date] => 2002-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
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[patent_no_of_words] => 15321
[patent_no_of_claims] => 36
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/892/06892272.pdf
[firstpage_image] =>[orig_patent_app_number] => 10131370
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/131370 | Method and apparatus for determining a longest prefix match in a content addressable memory device | Apr 22, 2002 | Issued |
Array
(
[id] => 6460328
[patent_doc_number] => 20020178324
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-11-28
[patent_title] => 'High performance cost optimized memory'
[patent_app_type] => new
[patent_app_number] => 10/128167
[patent_app_country] => US
[patent_app_date] => 2002-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 45
[patent_figures_cnt] => 45
[patent_no_of_words] => 9824
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0178/20020178324.pdf
[firstpage_image] =>[orig_patent_app_number] => 10128167
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/128167 | High performance cost optimized memory | Apr 21, 2002 | Issued |
Array
(
[id] => 6795294
[patent_doc_number] => 20030174167
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-09-18
[patent_title] => 'System and apparatus for accessing and transporting electronic communications using a portable data storage device'
[patent_app_type] => new
[patent_app_number] => 10/126089
[patent_app_country] => US
[patent_app_date] => 2002-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 3422
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0174/20030174167.pdf
[firstpage_image] =>[orig_patent_app_number] => 10126089
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/126089 | System and apparatus for accessing and transporting electronic communications using a portable data storage device | Apr 18, 2002 | Abandoned |
Array
(
[id] => 619675
[patent_doc_number] => 07146454
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-12-05
[patent_title] => 'Hiding refresh in 1T-SRAM architecture'
[patent_app_type] => utility
[patent_app_number] => 10/124773
[patent_app_country] => US
[patent_app_date] => 2002-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 3790
[patent_no_of_claims] => 24
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/146/07146454.pdf
[firstpage_image] =>[orig_patent_app_number] => 10124773
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/124773 | Hiding refresh in 1T-SRAM architecture | Apr 15, 2002 | Issued |
Array
(
[id] => 1185779
[patent_doc_number] => 06745283
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-06-01
[patent_title] => 'Disk drive for dynamically allocating memory accessed concurrently by a host interface and a disk interface to facilitate large host commands'
[patent_app_type] => B1
[patent_app_number] => 10/123967
[patent_app_country] => US
[patent_app_date] => 2002-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/745/06745283.pdf
[firstpage_image] =>[orig_patent_app_number] => 10123967
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/123967 | Disk drive for dynamically allocating memory accessed concurrently by a host interface and a disk interface to facilitate large host commands | Apr 15, 2002 | Issued |
Array
(
[id] => 7621146
[patent_doc_number] => 06978355
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-12-20
[patent_title] => 'Cache memory transfer during a requested data retrieval operation'
[patent_app_type] => utility
[patent_app_number] => 10/121774
[patent_app_country] => US
[patent_app_date] => 2002-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 4512
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/978/06978355.pdf
[firstpage_image] =>[orig_patent_app_number] => 10121774
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/121774 | Cache memory transfer during a requested data retrieval operation | Apr 10, 2002 | Issued |
Array
(
[id] => 6051424
[patent_doc_number] => 20020169930
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-11-14
[patent_title] => 'Memory access control system, method thereof and host bridge'
[patent_app_type] => new
[patent_app_number] => 10/119906
[patent_app_country] => US
[patent_app_date] => 2002-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0169/20020169930.pdf
[firstpage_image] =>[orig_patent_app_number] => 10119906
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/119906 | Memory access control system, method thereof and host bridge | Apr 10, 2002 | Abandoned |