Search

Anthony J Green

Examiner (ID: 130, Phone: (571)272-1367 , Office: P/1731 )

Most Active Art Unit
1731
Art Unit(s)
1754, 2899, 1108, 1793, 1731, 1755
Total Applications
4596
Issued Applications
3675
Pending Applications
315
Abandoned Applications
605

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4122055 [patent_doc_number] => 06052764 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-18 [patent_title] => 'Computer data restoration assembly and associated method' [patent_app_type] => 1 [patent_app_number] => 8/994364 [patent_app_country] => US [patent_app_date] => 1997-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2747 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/052/06052764.pdf [firstpage_image] =>[orig_patent_app_number] => 994364 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/994364
Computer data restoration assembly and associated method Dec 18, 1997 Issued
Array ( [id] => 4269251 [patent_doc_number] => 06138221 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Method and system for supplying streams of data having identical maximum consumption rate in a storage medium' [patent_app_type] => 1 [patent_app_number] => 8/993952 [patent_app_country] => US [patent_app_date] => 1997-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 9695 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/138/06138221.pdf [firstpage_image] =>[orig_patent_app_number] => 993952 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/993952
Method and system for supplying streams of data having identical maximum consumption rate in a storage medium Dec 17, 1997 Issued
Array ( [id] => 4374158 [patent_doc_number] => 06175902 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-16 [patent_title] => 'Method and apparatus for maintaining a time order by physical ordering in a memory' [patent_app_type] => 1 [patent_app_number] => 8/992925 [patent_app_country] => US [patent_app_date] => 1997-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 14467 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/175/06175902.pdf [firstpage_image] =>[orig_patent_app_number] => 992925 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/992925
Method and apparatus for maintaining a time order by physical ordering in a memory Dec 17, 1997 Issued
Array ( [id] => 4151764 [patent_doc_number] => 06035377 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-07 [patent_title] => 'Method and apparatus for determining memory pages having greatest frequency of access in a non-uniform memory access computer system' [patent_app_type] => 1 [patent_app_number] => 8/982181 [patent_app_country] => US [patent_app_date] => 1997-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3601 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/035/06035377.pdf [firstpage_image] =>[orig_patent_app_number] => 982181 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/982181
Method and apparatus for determining memory pages having greatest frequency of access in a non-uniform memory access computer system Dec 16, 1997 Issued
Array ( [id] => 4151779 [patent_doc_number] => 06035378 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-07 [patent_title] => 'Method and apparatus for dynamically monitoring memory page access frequency in a non-uniform memory access computer system' [patent_app_type] => 1 [patent_app_number] => 8/991696 [patent_app_country] => US [patent_app_date] => 1997-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 3 [patent_no_of_words] => 2709 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/035/06035378.pdf [firstpage_image] =>[orig_patent_app_number] => 991696 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/991696
Method and apparatus for dynamically monitoring memory page access frequency in a non-uniform memory access computer system Dec 15, 1997 Issued
Array ( [id] => 4310102 [patent_doc_number] => 06212599 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-03 [patent_title] => 'Method and apparatus for a memory control system including a secondary controller for DRAM refresh during sleep mode' [patent_app_type] => 1 [patent_app_number] => 8/978117 [patent_app_country] => US [patent_app_date] => 1997-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6153 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/212/06212599.pdf [firstpage_image] =>[orig_patent_app_number] => 978117 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/978117
Method and apparatus for a memory control system including a secondary controller for DRAM refresh during sleep mode Nov 25, 1997 Issued
Array ( [id] => 4118359 [patent_doc_number] => 06098160 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Data pointer for outputting indirect addressing mode addresses within a single cycle and method therefor' [patent_app_type] => 1 [patent_app_number] => 8/959559 [patent_app_country] => US [patent_app_date] => 1997-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2644 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/098/06098160.pdf [firstpage_image] =>[orig_patent_app_number] => 959559 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/959559
Data pointer for outputting indirect addressing mode addresses within a single cycle and method therefor Oct 27, 1997 Issued
Array ( [id] => 4109874 [patent_doc_number] => 06134626 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Method and apparatus for recording data using multiple buffers' [patent_app_type] => 1 [patent_app_number] => 8/959364 [patent_app_country] => US [patent_app_date] => 1997-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 24 [patent_no_of_words] => 6389 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/134/06134626.pdf [firstpage_image] =>[orig_patent_app_number] => 959364 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/959364
Method and apparatus for recording data using multiple buffers Oct 27, 1997 Issued
Array ( [id] => 1466199 [patent_doc_number] => 06393526 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-21 [patent_title] => 'Shared cache parsing and pre-fetch' [patent_app_type] => B1 [patent_app_number] => 08/959313 [patent_app_country] => US [patent_app_date] => 1997-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2911 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/393/06393526.pdf [firstpage_image] =>[orig_patent_app_number] => 08959313 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/959313
Shared cache parsing and pre-fetch Oct 27, 1997 Issued
Array ( [id] => 4155769 [patent_doc_number] => 06122702 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-19 [patent_title] => 'Memory cells matrix for a semiconductor integrated microcontroller' [patent_app_type] => 1 [patent_app_number] => 8/951261 [patent_app_country] => US [patent_app_date] => 1997-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 4394 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/122/06122702.pdf [firstpage_image] =>[orig_patent_app_number] => 951261 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/951261
Memory cells matrix for a semiconductor integrated microcontroller Oct 15, 1997 Issued
Array ( [id] => 4033688 [patent_doc_number] => 05963977 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-05 [patent_title] => 'Buffer management and system coordination method' [patent_app_type] => 1 [patent_app_number] => 8/947213 [patent_app_country] => US [patent_app_date] => 1997-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 10069 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/963/05963977.pdf [firstpage_image] =>[orig_patent_app_number] => 947213 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/947213
Buffer management and system coordination method Oct 8, 1997 Issued
Array ( [id] => 4211423 [patent_doc_number] => 06044443 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-28 [patent_title] => 'Portable computer with memory management system and method for prolonging the lifetime of internal battery' [patent_app_type] => 1 [patent_app_number] => 8/941537 [patent_app_country] => US [patent_app_date] => 1997-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2085 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/044/06044443.pdf [firstpage_image] =>[orig_patent_app_number] => 941537 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/941537
Portable computer with memory management system and method for prolonging the lifetime of internal battery Sep 29, 1997 Issued
Array ( [id] => 4215562 [patent_doc_number] => 06014729 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-11 [patent_title] => 'Shared memory arbitration apparatus and method' [patent_app_type] => 1 [patent_app_number] => 8/939783 [patent_app_country] => US [patent_app_date] => 1997-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4517 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 465 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/014/06014729.pdf [firstpage_image] =>[orig_patent_app_number] => 939783 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/939783
Shared memory arbitration apparatus and method Sep 28, 1997 Issued
Array ( [id] => 4237237 [patent_doc_number] => 06112277 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-29 [patent_title] => 'Method and means for reducing device contention by random accessing and partial track staging of records according to a first DASD format but device mapped according to a second DASD format' [patent_app_type] => 1 [patent_app_number] => 8/937423 [patent_app_country] => US [patent_app_date] => 1997-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5592 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 383 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/112/06112277.pdf [firstpage_image] =>[orig_patent_app_number] => 937423 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/937423
Method and means for reducing device contention by random accessing and partial track staging of records according to a first DASD format but device mapped according to a second DASD format Sep 24, 1997 Issued
Array ( [id] => 4223988 [patent_doc_number] => 06079002 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-20 [patent_title] => 'Dynamic expansion of execution pipeline stages' [patent_app_type] => 1 [patent_app_number] => 8/935573 [patent_app_country] => US [patent_app_date] => 1997-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3987 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/079/06079002.pdf [firstpage_image] =>[orig_patent_app_number] => 935573 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/935573
Dynamic expansion of execution pipeline stages Sep 22, 1997 Issued
Array ( [id] => 4103645 [patent_doc_number] => 06026463 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-15 [patent_title] => 'Method for improving data transfer rates for user data stored on a disk storage device' [patent_app_type] => 1 [patent_app_number] => 8/927233 [patent_app_country] => US [patent_app_date] => 1997-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6112 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/026/06026463.pdf [firstpage_image] =>[orig_patent_app_number] => 927233 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/927233
Method for improving data transfer rates for user data stored on a disk storage device Sep 9, 1997 Issued
Array ( [id] => 4399254 [patent_doc_number] => 06295584 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-25 [patent_title] => 'Multiprocessor computer system with memory map translation' [patent_app_type] => 1 [patent_app_number] => 8/920673 [patent_app_country] => US [patent_app_date] => 1997-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 5505 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/295/06295584.pdf [firstpage_image] =>[orig_patent_app_number] => 920673 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/920673
Multiprocessor computer system with memory map translation Aug 28, 1997 Issued
Array ( [id] => 4310128 [patent_doc_number] => 06212601 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-03 [patent_title] => 'Microprocessor system with block move circuit disposed between cache circuits' [patent_app_type] => 1 [patent_app_number] => 8/920379 [patent_app_country] => US [patent_app_date] => 1997-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 11854 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/212/06212601.pdf [firstpage_image] =>[orig_patent_app_number] => 920379 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/920379
Microprocessor system with block move circuit disposed between cache circuits Aug 28, 1997 Issued
Array ( [id] => 4381225 [patent_doc_number] => 06256708 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Auxiliary buffer for direct map cache' [patent_app_type] => 1 [patent_app_number] => 8/919194 [patent_app_country] => US [patent_app_date] => 1997-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 26 [patent_no_of_words] => 9108 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/256/06256708.pdf [firstpage_image] =>[orig_patent_app_number] => 919194 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/919194
Auxiliary buffer for direct map cache Aug 27, 1997 Issued
Array ( [id] => 3967436 [patent_doc_number] => 05983330 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-09 [patent_title] => 'Microcomputer with watchdog timer settings suppressing interrupt request processing over memory data write operation to flash memory' [patent_app_type] => 1 [patent_app_number] => 8/917189 [patent_app_country] => US [patent_app_date] => 1997-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4114 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/983/05983330.pdf [firstpage_image] =>[orig_patent_app_number] => 917189 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/917189
Microcomputer with watchdog timer settings suppressing interrupt request processing over memory data write operation to flash memory Aug 24, 1997 Issued
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