Search

Anthony J Green

Examiner (ID: 130, Phone: (571)272-1367 , Office: P/1731 )

Most Active Art Unit
1731
Art Unit(s)
1754, 2899, 1108, 1793, 1731, 1755
Total Applications
4596
Issued Applications
3675
Pending Applications
315
Abandoned Applications
605

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19375382 [patent_doc_number] => 12066947 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-20 [patent_title] => Optimization of quality of service of data storage devices [patent_app_type] => utility [patent_app_number] => 16/791851 [patent_app_country] => US [patent_app_date] => 2020-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 14541 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16791851 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/791851
Optimization of quality of service of data storage devices Feb 13, 2020 Issued
Array ( [id] => 17605990 [patent_doc_number] => 11334479 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-05-17 [patent_title] => Configuring write parallelism for namespaces in a nonvolatile memory controller [patent_app_type] => utility [patent_app_number] => 16/783083 [patent_app_country] => US [patent_app_date] => 2020-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 37 [patent_no_of_words] => 37397 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16783083 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/783083
Configuring write parallelism for namespaces in a nonvolatile memory controller Feb 4, 2020 Issued
Array ( [id] => 17699050 [patent_doc_number] => 11372775 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-28 [patent_title] => Management of the untranslated to translated code steering logic in a dynamic binary translation based processor [patent_app_type] => utility [patent_app_number] => 16/777063 [patent_app_country] => US [patent_app_date] => 2020-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 13941 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16777063 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/777063
Management of the untranslated to translated code steering logic in a dynamic binary translation based processor Jan 29, 2020 Issued
Array ( [id] => 17846532 [patent_doc_number] => 11435902 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-06 [patent_title] => System, method and computer program product for instantiating blocks of a solid-state disk to include different flash characteristics [patent_app_type] => utility [patent_app_number] => 16/775643 [patent_app_country] => US [patent_app_date] => 2020-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5290 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16775643 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/775643
System, method and computer program product for instantiating blocks of a solid-state disk to include different flash characteristics Jan 28, 2020 Issued
Array ( [id] => 17557932 [patent_doc_number] => 11314636 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-04-26 [patent_title] => Nonvolatile/persistent memory drive with address subsections configured for respective read bandwidths [patent_app_type] => utility [patent_app_number] => 16/751925 [patent_app_country] => US [patent_app_date] => 2020-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 37 [patent_no_of_words] => 37393 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16751925 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/751925
Nonvolatile/persistent memory drive with address subsections configured for respective read bandwidths Jan 23, 2020 Issued
Array ( [id] => 17238221 [patent_doc_number] => 11182099 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-23 [patent_title] => Memory system and operating method thereof [patent_app_type] => utility [patent_app_number] => 16/749898 [patent_app_country] => US [patent_app_date] => 2020-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6258 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16749898 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/749898
Memory system and operating method thereof Jan 21, 2020 Issued
Array ( [id] => 17605787 [patent_doc_number] => 11334275 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Reducing a rate at which data is mirrored from a primary server to a secondary server [patent_app_type] => utility [patent_app_number] => 16/735654 [patent_app_country] => US [patent_app_date] => 2020-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4712 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16735654 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/735654
Reducing a rate at which data is mirrored from a primary server to a secondary server Jan 5, 2020 Issued
Array ( [id] => 15903245 [patent_doc_number] => 20200151142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => NAMESPACE PERFORMANCE ACCELERATION BY SELECTIVE SSD CACHING [patent_app_type] => utility [patent_app_number] => 16/732955 [patent_app_country] => US [patent_app_date] => 2020-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4865 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16732955 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/732955
Namespace performance acceleration by selective SSD caching Jan 1, 2020 Issued
Array ( [id] => 18104310 [patent_doc_number] => 11544196 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-03 [patent_title] => Resource-aware compression [patent_app_type] => utility [patent_app_number] => 16/725971 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4948 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16725971 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/725971
Resource-aware compression Dec 22, 2019 Issued
Array ( [id] => 16903281 [patent_doc_number] => 20210182197 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => CACHE SNOOPING MODE EXTENDING COHERENCE PROTECTION FOR CERTAIN REQUESTS [patent_app_type] => utility [patent_app_number] => 16/717835 [patent_app_country] => US [patent_app_date] => 2019-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9764 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16717835 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/717835
Cache snooping mode extending coherence protection for certain requests Dec 16, 2019 Issued
Array ( [id] => 16903282 [patent_doc_number] => 20210182198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => CACHE SNOOPING MODE EXTENDING COHERENCE PROTECTION FOR CERTAIN REQUESTS [patent_app_type] => utility [patent_app_number] => 16/717868 [patent_app_country] => US [patent_app_date] => 2019-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10858 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16717868 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/717868
Cache snooping mode extending coherence protection for certain requests Dec 16, 2019 Issued
Array ( [id] => 17309110 [patent_doc_number] => 11210221 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-28 [patent_title] => Memory architecture for efficient spatial-temporal data storage and access [patent_app_type] => utility [patent_app_number] => 16/709217 [patent_app_country] => US [patent_app_date] => 2019-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 19845 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16709217 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/709217
Memory architecture for efficient spatial-temporal data storage and access Dec 9, 2019 Issued
Array ( [id] => 16017555 [patent_doc_number] => 20200183621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => RESOLVING FAILED OR HANGING MOUNT POINTS IN A CLUSTERED STORAGE SOLUTION FOR CONTAINERS [patent_app_type] => utility [patent_app_number] => 16/709861 [patent_app_country] => US [patent_app_date] => 2019-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8670 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16709861 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/709861
Resolving failed or hanging mount points in a clustered storage solution for containers Dec 9, 2019 Issued
Array ( [id] => 16077679 [patent_doc_number] => 20200192826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => Flash Translation Layer with Hierarchical Security [patent_app_type] => utility [patent_app_number] => 16/708453 [patent_app_country] => US [patent_app_date] => 2019-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9358 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16708453 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/708453
Flash translation layer with hierarchical security Dec 9, 2019 Issued
Array ( [id] => 15772757 [patent_doc_number] => 20200117396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => MEMORY MODULE AND MEMORY SYSTEM RELATING THERETO [patent_app_type] => utility [patent_app_number] => 16/706078 [patent_app_country] => US [patent_app_date] => 2019-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6717 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16706078 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/706078
Memory module and memory system relating thereto Dec 5, 2019 Issued
Array ( [id] => 17121160 [patent_doc_number] => 11132295 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-28 [patent_title] => Memory system and method for controlling nonvolatile memory [patent_app_type] => utility [patent_app_number] => 16/704924 [patent_app_country] => US [patent_app_date] => 2019-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 43 [patent_no_of_words] => 25260 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16704924 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/704924
Memory system and method for controlling nonvolatile memory Dec 4, 2019 Issued
Array ( [id] => 16018033 [patent_doc_number] => 20200183860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => PROCESSING DEVICE AND METHOD FOR CHANGING FUNCTION OF PINS [patent_app_type] => utility [patent_app_number] => 16/700019 [patent_app_country] => US [patent_app_date] => 2019-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3030 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16700019 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/700019
Processing device and method for changing function of pins Dec 1, 2019 Issued
Array ( [id] => 17331490 [patent_doc_number] => 11221954 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-11 [patent_title] => Storing metadata in heterogeneous cache to improve I/O performance [patent_app_type] => utility [patent_app_number] => 16/687222 [patent_app_country] => US [patent_app_date] => 2019-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5372 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16687222 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/687222
Storing metadata in heterogeneous cache to improve I/O performance Nov 17, 2019 Issued
Array ( [id] => 15622881 [patent_doc_number] => 20200081845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => METHOD AND SYSTEM FOR USER-SPACE STORAGE I/O STACK WITH USER-SPACE FLASH TRANSLATION LAYER [patent_app_type] => utility [patent_app_number] => 16/685606 [patent_app_country] => US [patent_app_date] => 2019-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6154 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16685606 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/685606
Method and system for user-space storage I/O stack with user-space flash translation layer Nov 14, 2019 Issued
Array ( [id] => 16826435 [patent_doc_number] => 20210141728 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-13 [patent_title] => SYSTEM AND METHOD OF A HIGHLY CONCURRENT CACHE REPLACEMENT ALGORITHM [patent_app_type] => utility [patent_app_number] => 16/679570 [patent_app_country] => US [patent_app_date] => 2019-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7113 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16679570 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/679570
System and method of a highly concurrent cache replacement algorithm Nov 10, 2019 Issued
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