
Anthony L. Bacon
Examiner (ID: 13838, Phone: (571)270-5623 , Office: P/3747 )
| Most Active Art Unit | 3747 |
| Art Unit(s) | 4159, 3747 |
| Total Applications | 545 |
| Issued Applications | 419 |
| Pending Applications | 0 |
| Abandoned Applications | 131 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 12061803
[patent_doc_number] => 20170338146
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-11-23
[patent_title] => 'Method for Patterning Interconnects'
[patent_app_type] => utility
[patent_app_number] => 15/593149
[patent_app_country] => US
[patent_app_date] => 2017-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 19146
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15593149
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/593149 | Method for patterning interconnects | May 10, 2017 | Issued |
Array
(
[id] => 12477810
[patent_doc_number] => 09991191
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-06-05
[patent_title] => Electronic power device with flat electronic interconnection structure
[patent_app_type] => utility
[patent_app_number] => 15/585293
[patent_app_country] => US
[patent_app_date] => 2017-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 8122
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 206
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15585293
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/585293 | Electronic power device with flat electronic interconnection structure | May 2, 2017 | Issued |
Array
(
[id] => 12019629
[patent_doc_number] => 09812339
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-11-07
[patent_title] => 'Method of assembling semiconductor devices of varying thicknesses'
[patent_app_type] => utility
[patent_app_number] => 15/495915
[patent_app_country] => US
[patent_app_date] => 2017-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 3064
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15495915
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/495915 | Method of assembling semiconductor devices of varying thicknesses | Apr 23, 2017 | Issued |
Array
(
[id] => 12147595
[patent_doc_number] => 09881852
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-01-30
[patent_title] => 'Semiconductor module'
[patent_app_type] => utility
[patent_app_number] => 15/491028
[patent_app_country] => US
[patent_app_date] => 2017-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 18
[patent_no_of_words] => 7091
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15491028
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/491028 | Semiconductor module | Apr 18, 2017 | Issued |
Array
(
[id] => 11840089
[patent_doc_number] => 20170221809
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-08-03
[patent_title] => 'SEMICONDUCTOR APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 15/490322
[patent_app_country] => US
[patent_app_date] => 2017-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3650
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15490322
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/490322 | Semiconductor apparatus | Apr 17, 2017 | Issued |
Array
(
[id] => 13057215
[patent_doc_number] => 10050006
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-08-14
[patent_title] => Chip package and method for forming the same
[patent_app_type] => utility
[patent_app_number] => 15/483928
[patent_app_country] => US
[patent_app_date] => 2017-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 17
[patent_no_of_words] => 5786
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15483928
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/483928 | Chip package and method for forming the same | Apr 9, 2017 | Issued |
Array
(
[id] => 12416862
[patent_doc_number] => 09972569
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-05-15
[patent_title] => Robust low inductance power module package
[patent_app_type] => utility
[patent_app_number] => 15/482228
[patent_app_country] => US
[patent_app_date] => 2017-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 7033
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15482228
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/482228 | Robust low inductance power module package | Apr 6, 2017 | Issued |
Array
(
[id] => 12294060
[patent_doc_number] => 09935041
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-04-03
[patent_title] => Multi-chip module clips with connector bar
[patent_app_type] => utility
[patent_app_number] => 15/480999
[patent_app_country] => US
[patent_app_date] => 2017-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 4682
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15480999
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/480999 | Multi-chip module clips with connector bar | Apr 5, 2017 | Issued |
Array
(
[id] => 13653365
[patent_doc_number] => 09853003
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-12-26
[patent_title] => Fan-out semiconductor package
[patent_app_type] => utility
[patent_app_number] => 15/480573
[patent_app_country] => US
[patent_app_date] => 2017-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 33
[patent_no_of_words] => 12347
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15480573
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/480573 | Fan-out semiconductor package | Apr 5, 2017 | Issued |
Array
(
[id] => 13188095
[patent_doc_number] => 10109574
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-10-23
[patent_title] => Structure and method for improving high voltage breakdown reliability of a microelectronic device
[patent_app_type] => utility
[patent_app_number] => 15/478615
[patent_app_country] => US
[patent_app_date] => 2017-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 7139
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15478615
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/478615 | Structure and method for improving high voltage breakdown reliability of a microelectronic device | Apr 3, 2017 | Issued |
Array
(
[id] => 12779950
[patent_doc_number] => 20180151818
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-05-31
[patent_title] => OPTOELECTRONIC DIODES AND ELECTRONIC DEVICES INCLUDING SAME
[patent_app_type] => utility
[patent_app_number] => 15/478687
[patent_app_country] => US
[patent_app_date] => 2017-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12044
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15478687
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/478687 | Optoelectronic diodes and electronic devices including same | Apr 3, 2017 | Issued |
Array
(
[id] => 12257140
[patent_doc_number] => 09929293
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-03-27
[patent_title] => 'Superlattice photodetector having improved carrier mobility'
[patent_app_type] => utility
[patent_app_number] => 15/479134
[patent_app_country] => US
[patent_app_date] => 2017-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 1600
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15479134
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/479134 | Superlattice photodetector having improved carrier mobility | Apr 3, 2017 | Issued |
Array
(
[id] => 13862469
[patent_doc_number] => 10192962
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-01-29
[patent_title] => Semiconductor device and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 15/478861
[patent_app_country] => US
[patent_app_date] => 2017-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 8772
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 200
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15478861
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/478861 | Semiconductor device and method for manufacturing the same | Apr 3, 2017 | Issued |
Array
(
[id] => 12335016
[patent_doc_number] => 09947673
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-04-17
[patent_title] => Semiconductor memory device
[patent_app_type] => utility
[patent_app_number] => 15/479253
[patent_app_country] => US
[patent_app_date] => 2017-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 3843
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 274
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15479253
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/479253 | Semiconductor memory device | Apr 3, 2017 | Issued |
Array
(
[id] => 15308681
[patent_doc_number] => 10519030
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-12-31
[patent_title] => Transducer package with integrated sealing
[patent_app_type] => utility
[patent_app_number] => 15/478946
[patent_app_country] => US
[patent_app_date] => 2017-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 6013
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15478946
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/478946 | Transducer package with integrated sealing | Apr 3, 2017 | Issued |
Array
(
[id] => 11760183
[patent_doc_number] => 20170207052
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-07-20
[patent_title] => 'METALLIC DEVICE HAVING MOBILE ELEMENT IN A CAVITY OF THE BEOL OF AN INTEGRATED CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 15/477876
[patent_app_country] => US
[patent_app_date] => 2017-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 5524
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15477876
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/477876 | Metallic device having mobile element in a cavity of the BEOL of an integrated circuit | Apr 2, 2017 | Issued |
Array
(
[id] => 15475143
[patent_doc_number] => 10553456
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-02-04
[patent_title] => Semiconductor package and manufacturing method of semiconductor package
[patent_app_type] => utility
[patent_app_number] => 15/472387
[patent_app_country] => US
[patent_app_date] => 2017-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 26
[patent_no_of_words] => 11461
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15472387
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/472387 | Semiconductor package and manufacturing method of semiconductor package | Mar 28, 2017 | Issued |
Array
(
[id] => 12416841
[patent_doc_number] => 09972562
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-05-15
[patent_title] => Semiconductor device and corresponding method
[patent_app_type] => utility
[patent_app_number] => 15/471472
[patent_app_country] => US
[patent_app_date] => 2017-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 4121
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15471472
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/471472 | Semiconductor device and corresponding method | Mar 27, 2017 | Issued |
Array
(
[id] => 12195550
[patent_doc_number] => 09899287
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-02-20
[patent_title] => 'Fan-out wafer level package structure'
[patent_app_type] => utility
[patent_app_number] => 15/469594
[patent_app_country] => US
[patent_app_date] => 2017-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 4480
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15469594
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/469594 | Fan-out wafer level package structure | Mar 26, 2017 | Issued |
Array
(
[id] => 11869439
[patent_doc_number] => 20170236725
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-08-17
[patent_title] => 'METHOD OF MANUFACTURING PACKAGE SUBSTRATE AND SEMICONDUCTOR PACKAGE'
[patent_app_type] => utility
[patent_app_number] => 15/466063
[patent_app_country] => US
[patent_app_date] => 2017-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3593
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15466063
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/466063 | Method of manufacturing package substrate and semiconductor package | Mar 21, 2017 | Issued |