
Anthony L. Bacon
Examiner (ID: 13838, Phone: (571)270-5623 , Office: P/3747 )
| Most Active Art Unit | 3747 |
| Art Unit(s) | 4159, 3747 |
| Total Applications | 545 |
| Issued Applications | 419 |
| Pending Applications | 0 |
| Abandoned Applications | 131 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11732792
[patent_doc_number] => 20170194234
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-07-06
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/465427
[patent_app_country] => US
[patent_app_date] => 2017-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 14473
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15465427
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/465427 | Semiconductor device | Mar 20, 2017 | Issued |
Array
(
[id] => 11967076
[patent_doc_number] => 20170271229
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-09-21
[patent_title] => 'Spatially selective roughening of encapsulant to promote adhesion with functional structure'
[patent_app_type] => utility
[patent_app_number] => 15/462858
[patent_app_country] => US
[patent_app_date] => 2017-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 10097
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15462858
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/462858 | Spatially selective roughening of encapsulant to promote adhesion with functional structure | Mar 18, 2017 | Issued |
Array
(
[id] => 16668473
[patent_doc_number] => 10937731
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-03-02
[patent_title] => Semiconductor module and method for manufacturing semiconductor module
[patent_app_type] => utility
[patent_app_number] => 16/318194
[patent_app_country] => US
[patent_app_date] => 2017-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 3641
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16318194
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/318194 | Semiconductor module and method for manufacturing semiconductor module | Mar 16, 2017 | Issued |
Array
(
[id] => 11718225
[patent_doc_number] => 20170186724
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-29
[patent_title] => 'SYSTEMS AND METHODS FOR BONDING SEMICONDUCTOR ELEMENTS'
[patent_app_type] => utility
[patent_app_number] => 15/458381
[patent_app_country] => US
[patent_app_date] => 2017-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 11269
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15458381
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/458381 | Systems and methods for bonding semiconductor elements | Mar 13, 2017 | Issued |
Array
(
[id] => 11911146
[patent_doc_number] => 09779965
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-10-03
[patent_title] => 'Systems and methods for bonding semiconductor elements'
[patent_app_type] => utility
[patent_app_number] => 15/456767
[patent_app_country] => US
[patent_app_date] => 2017-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 29
[patent_no_of_words] => 9100
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15456767
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/456767 | Systems and methods for bonding semiconductor elements | Mar 12, 2017 | Issued |
Array
(
[id] => 11718156
[patent_doc_number] => 20170186655
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-29
[patent_title] => 'Structure for Die Probing'
[patent_app_type] => utility
[patent_app_number] => 15/455925
[patent_app_country] => US
[patent_app_date] => 2017-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 5370
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15455925
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/455925 | Structure for die probing | Mar 9, 2017 | Issued |
Array
(
[id] => 13420061
[patent_doc_number] => 20180261573
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-09-13
[patent_title] => SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 15/454520
[patent_app_country] => US
[patent_app_date] => 2017-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6663
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15454520
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/454520 | Semiconductor device package and method of manufacturing the same | Mar 8, 2017 | Issued |
Array
(
[id] => 12147619
[patent_doc_number] => 09881879
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-01-30
[patent_title] => 'Power semiconductor module'
[patent_app_type] => utility
[patent_app_number] => 15/449340
[patent_app_country] => US
[patent_app_date] => 2017-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 6418
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15449340
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/449340 | Power semiconductor module | Mar 2, 2017 | Issued |
Array
(
[id] => 11710506
[patent_doc_number] => 20170179006
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-22
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/449117
[patent_app_country] => US
[patent_app_date] => 2017-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3157
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15449117
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/449117 | Semiconductor device | Mar 2, 2017 | Issued |
Array
(
[id] => 12202458
[patent_doc_number] => 09905530
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-02-27
[patent_title] => 'Systems and methods for bonding semiconductor elements'
[patent_app_type] => utility
[patent_app_number] => 15/449466
[patent_app_country] => US
[patent_app_date] => 2017-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 17
[patent_no_of_words] => 5321
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15449466
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/449466 | Systems and methods for bonding semiconductor elements | Mar 2, 2017 | Issued |
Array
(
[id] => 13640555
[patent_doc_number] => 09847238
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-12-19
[patent_title] => Fan-out wafer-level packaging using metal foil lamination
[patent_app_type] => utility
[patent_app_number] => 15/443371
[patent_app_country] => US
[patent_app_date] => 2017-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 28
[patent_no_of_words] => 4655
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15443371
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/443371 | Fan-out wafer-level packaging using metal foil lamination | Feb 26, 2017 | Issued |
Array
(
[id] => 12195572
[patent_doc_number] => 09899308
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-02-20
[patent_title] => 'Semiconductor package and method of fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 15/434599
[patent_app_country] => US
[patent_app_date] => 2017-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 17
[patent_no_of_words] => 3571
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15434599
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/434599 | Semiconductor package and method of fabricating the same | Feb 15, 2017 | Issued |
Array
(
[id] => 11666151
[patent_doc_number] => 20170154870
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-01
[patent_title] => 'Discrete Polymer in Fan-Out Packages'
[patent_app_type] => utility
[patent_app_number] => 15/431192
[patent_app_country] => US
[patent_app_date] => 2017-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 5460
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15431192
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/431192 | Discrete polymer in fan-out packages | Feb 12, 2017 | Issued |
Array
(
[id] => 11666143
[patent_doc_number] => 20170154862
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-01
[patent_title] => 'Methods of Forming Connector Pad Structures, Interconnect Structures, and Structures Thereof'
[patent_app_type] => utility
[patent_app_number] => 15/431514
[patent_app_country] => US
[patent_app_date] => 2017-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 9202
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15431514
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/431514 | Methods of forming connector pad structures, interconnect structures, and structures thereof | Feb 12, 2017 | Issued |
Array
(
[id] => 16936461
[patent_doc_number] => 20210202350
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-01
[patent_title] => METHOD FOR PRODUCING A HEAT-SPREADING PLATE, HEAT-SPREADING PLATE, METHOD FOR PRODUCING A SEMICONDUCTOR MODULE AND SEMICONDUCTOR MODULE
[patent_app_type] => utility
[patent_app_number] => 15/999536
[patent_app_country] => US
[patent_app_date] => 2017-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7504
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15999536
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/999536 | METHOD FOR PRODUCING A HEAT-SPREADING PLATE, HEAT-SPREADING PLATE, METHOD FOR PRODUCING A SEMICONDUCTOR MODULE AND SEMICONDUCTOR MODULE | Feb 8, 2017 | Abandoned |
Array
(
[id] => 11652743
[patent_doc_number] => 20170148644
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-05-25
[patent_title] => 'Method for Producing a Power Semiconductor Module'
[patent_app_type] => utility
[patent_app_number] => 15/424995
[patent_app_country] => US
[patent_app_date] => 2017-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4825
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15424995
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/424995 | Method for producing a power semiconductor module | Feb 5, 2017 | Issued |
Array
(
[id] => 11652765
[patent_doc_number] => 20170148666
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-05-25
[patent_title] => 'DEVICE MANUFACTURE AND PACKAGING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 15/424245
[patent_app_country] => US
[patent_app_date] => 2017-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 8641
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15424245
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/424245 | Device manufacture and packaging method thereof | Feb 2, 2017 | Issued |
Array
(
[id] => 13893341
[patent_doc_number] => 10199223
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-02-05
[patent_title] => Semiconductor device fabrication using etch stop layer
[patent_app_type] => utility
[patent_app_number] => 15/413848
[patent_app_country] => US
[patent_app_date] => 2017-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4048
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 64
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15413848
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/413848 | Semiconductor device fabrication using etch stop layer | Jan 23, 2017 | Issued |
Array
(
[id] => 12250167
[patent_doc_number] => 09922949
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-03-20
[patent_title] => 'Semiconductor device and method'
[patent_app_type] => utility
[patent_app_number] => 15/405700
[patent_app_country] => US
[patent_app_date] => 2017-01-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 35
[patent_no_of_words] => 9834
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15405700
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/405700 | Semiconductor device and method | Jan 12, 2017 | Issued |
Array
(
[id] => 13145651
[patent_doc_number] => 10090164
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-10-02
[patent_title] => Hard masks for block patterning
[patent_app_type] => utility
[patent_app_number] => 15/404465
[patent_app_country] => US
[patent_app_date] => 2017-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4794
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15404465
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/404465 | Hard masks for block patterning | Jan 11, 2017 | Issued |