| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3585409
[patent_doc_number] => 05539880
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-23
[patent_title] => 'Cable-based interactive multimedia workstation network'
[patent_app_type] => 1
[patent_app_number] => 8/127340
[patent_app_country] => US
[patent_app_date] => 1993-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 3843
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/539/05539880.pdf
[firstpage_image] =>[orig_patent_app_number] => 127340
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/127340 | Cable-based interactive multimedia workstation network | Sep 27, 1993 | Issued |
Array
(
[id] => 3454446
[patent_doc_number] => 05430868
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-07-04
[patent_title] => 'Shared memory with benign failure modes'
[patent_app_type] => 1
[patent_app_number] => 8/125970
[patent_app_country] => US
[patent_app_date] => 1993-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 4589
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/430/05430868.pdf
[firstpage_image] =>[orig_patent_app_number] => 125970
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/125970 | Shared memory with benign failure modes | Sep 22, 1993 | Issued |
| 08/123357 | MEMORY DEVICE WITH LOGIC FUNCTION FOR SETTING OPERATION MODE THEREOF | Sep 16, 1993 | Abandoned |
Array
(
[id] => 3122473
[patent_doc_number] => 05465334
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-07
[patent_title] => 'Processor with a respective latch provided for each pipelined stage to transfer data to the pipeland stages'
[patent_app_type] => 1
[patent_app_number] => 8/121507
[patent_app_country] => US
[patent_app_date] => 1993-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6470
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 231
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/465/05465334.pdf
[firstpage_image] =>[orig_patent_app_number] => 121507
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/121507 | Processor with a respective latch provided for each pipelined stage to transfer data to the pipeland stages | Sep 15, 1993 | Issued |
Array
(
[id] => 3604370
[patent_doc_number] => 05568616
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-22
[patent_title] => 'System and method for dynamic scheduling of 3D graphics rendering using virtual packet length reduction'
[patent_app_type] => 1
[patent_app_number] => 8/121137
[patent_app_country] => US
[patent_app_date] => 1993-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 2491
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/568/05568616.pdf
[firstpage_image] =>[orig_patent_app_number] => 121137
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/121137 | System and method for dynamic scheduling of 3D graphics rendering using virtual packet length reduction | Sep 13, 1993 | Issued |
| 08/120597 | MEMORY MODULE ADAPTOR | Sep 12, 1993 | Abandoned |
Array
(
[id] => 3674344
[patent_doc_number] => 05657459
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-08-12
[patent_title] => 'Data input pen-based information processing apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/118756
[patent_app_country] => US
[patent_app_date] => 1993-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 41
[patent_no_of_words] => 15425
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/657/05657459.pdf
[firstpage_image] =>[orig_patent_app_number] => 118756
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/118756 | Data input pen-based information processing apparatus | Sep 9, 1993 | Issued |
Array
(
[id] => 3605509
[patent_doc_number] => 05522039
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-05-28
[patent_title] => 'Calculation of network data check sums by dedicated hardware with software corrections'
[patent_app_type] => 1
[patent_app_number] => 8/118959
[patent_app_country] => US
[patent_app_date] => 1993-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4746
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/522/05522039.pdf
[firstpage_image] =>[orig_patent_app_number] => 118959
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/118959 | Calculation of network data check sums by dedicated hardware with software corrections | Sep 8, 1993 | Issued |
Array
(
[id] => 3133952
[patent_doc_number] => 05384900
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-01-24
[patent_title] => 'Method of managing an image memory by a process independent of an image processing process'
[patent_app_type] => 1
[patent_app_number] => 8/116545
[patent_app_country] => US
[patent_app_date] => 1993-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 27
[patent_no_of_words] => 8579
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 212
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/384/05384900.pdf
[firstpage_image] =>[orig_patent_app_number] => 116545
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/116545 | Method of managing an image memory by a process independent of an image processing process | Sep 6, 1993 | Issued |
| 08/113299 | INTER-PROCESSOR COMMUNICATION VIA POST OFFICE RAM | Aug 29, 1993 | Abandoned |
| 08/112113 | DATA TRANSFER ACCELERATING APPARATUS AND METHOD | Aug 25, 1993 | Abandoned |
Array
(
[id] => 3506057
[patent_doc_number] => 05537594
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-16
[patent_title] => 'Query processing in a mobile communications system home location register'
[patent_app_type] => 1
[patent_app_number] => 8/109155
[patent_app_country] => US
[patent_app_date] => 1993-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 4762
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/537/05537594.pdf
[firstpage_image] =>[orig_patent_app_number] => 109155
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/109155 | Query processing in a mobile communications system home location register | Aug 18, 1993 | Issued |
| 08/106967 | RESPONDING TO SERVICE REQUESTS USING MINIMAL SYSTEM-SIDE CONTEXT IN A MULTIPROCESSOR ENVIRONMENT | Aug 15, 1993 | Abandoned |
Array
(
[id] => 3094110
[patent_doc_number] => 05321840
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-06-14
[patent_title] => 'Distributed-intelligence computer system including remotely reconfigurable, telephone-type user terminal'
[patent_app_type] => 1
[patent_app_number] => 8/104931
[patent_app_country] => US
[patent_app_date] => 1993-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 6881
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/321/05321840.pdf
[firstpage_image] =>[orig_patent_app_number] => 104931
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/104931 | Distributed-intelligence computer system including remotely reconfigurable, telephone-type user terminal | Aug 11, 1993 | Issued |
Array
(
[id] => 3433720
[patent_doc_number] => 05390336
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-02-14
[patent_title] => 'C\' parallel computer system having processing nodes with distributed memory with memory addresses defining unitary system address space'
[patent_app_type] => 1
[patent_app_number] => 8/105531
[patent_app_country] => US
[patent_app_date] => 1993-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 14
[patent_no_of_words] => 11331
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 269
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/390/05390336.pdf
[firstpage_image] =>[orig_patent_app_number] => 105531
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/105531 | C' parallel computer system having processing nodes with distributed memory with memory addresses defining unitary system address space | Aug 10, 1993 | Issued |
Array
(
[id] => 3575572
[patent_doc_number] => 05526490
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-11
[patent_title] => 'Data transfer control unit using a control circuit to achieve high speed data transfer'
[patent_app_type] => 1
[patent_app_number] => 8/104583
[patent_app_country] => US
[patent_app_date] => 1993-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 24
[patent_no_of_words] => 9903
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/526/05526490.pdf
[firstpage_image] =>[orig_patent_app_number] => 104583
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/104583 | Data transfer control unit using a control circuit to achieve high speed data transfer | Aug 10, 1993 | Issued |
| 08/106771 | ARRAY OF ONE-BIT PROCESSORS EACH HAVING ONLY ONE BIT OF MEMORY | Aug 10, 1993 | Abandoned |
Array
(
[id] => 3064496
[patent_doc_number] => 05325495
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-06-28
[patent_title] => 'Reducing stall delay in pipelined computer system using queue between pipeline stages'
[patent_app_type] => 1
[patent_app_number] => 8/103815
[patent_app_country] => US
[patent_app_date] => 1993-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 3567
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/325/05325495.pdf
[firstpage_image] =>[orig_patent_app_number] => 103815
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/103815 | Reducing stall delay in pipelined computer system using queue between pipeline stages | Aug 8, 1993 | Issued |
Array
(
[id] => 3111770
[patent_doc_number] => 05319794
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-06-07
[patent_title] => 'Device for high-speed processing of information frames'
[patent_app_type] => 1
[patent_app_number] => 8/102539
[patent_app_country] => US
[patent_app_date] => 1993-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4629
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 223
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/319/05319794.pdf
[firstpage_image] =>[orig_patent_app_number] => 102539
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/102539 | Device for high-speed processing of information frames | Aug 2, 1993 | Issued |
Array
(
[id] => 3470303
[patent_doc_number] => 05473763
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-12-05
[patent_title] => 'Interrupt vector method and apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/100152
[patent_app_country] => US
[patent_app_date] => 1993-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 12
[patent_no_of_words] => 5152
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 275
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/473/05473763.pdf
[firstpage_image] =>[orig_patent_app_number] => 100152
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/100152 | Interrupt vector method and apparatus | Aug 1, 1993 | Issued |