Aradhana Sasan

Array ( [id] => 2902207 [patent_doc_number] => 05239660 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-24 [patent_title] => 'Vector processor which can be formed by an integrated circuit of a small size' [patent_app_type] => 1 [patent_app_number] => 7/784509 [patent_app_country] => US [patent_app_date] => 1991-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 8099 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 525 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/239/05239660.pdf [firstpage_image] =>[orig_patent_app_number] => 784509 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3021062 [patent_doc_number] => 05355458 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-10-11 [patent_title] => 'Microcomputer with table address forcing for different size memories' [patent_app_type] => 1 [patent_app_number] => 7/774312 [patent_app_country] => US [patent_app_date] => 1991-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3695 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/355/05355458.pdf [firstpage_image] =>[orig_patent_app_number] => 774312 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2844144 [patent_doc_number] => 05129089 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-07 [patent_title] => 'Distributed interlock apparatus and distributed interlock management method' [patent_app_type] => 1 [patent_app_number] => 7/771784 [patent_app_country] => US [patent_app_date] => 1991-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1970 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/129/05129089.pdf [firstpage_image] =>[orig_patent_app_number] => 771784 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3032804 [patent_doc_number] => 05303366 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-12 [patent_title] => 'Interface card for scanner' [patent_app_type] => 1 [patent_app_number] => 7/767411 [patent_app_country] => US [patent_app_date] => 1991-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1204 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 324 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/303/05303366.pdf [firstpage_image] =>[orig_patent_app_number] => 767411 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3527360 [patent_doc_number] => 05487172 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-23 [patent_title] => 'Transform processor system having reduced processing bandwith' [patent_app_type] => 1 [patent_app_number] => 7/763461 [patent_app_country] => US [patent_app_date] => 1991-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 107 [patent_figures_cnt] => 147 [patent_no_of_words] => 193825 [patent_no_of_claims] => 72 [patent_no_of_ind_claims] => 17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/487/05487172.pdf [firstpage_image] =>[orig_patent_app_number] => 763461 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3126133 [patent_doc_number] => 05414835 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-09 [patent_title] => 'IC card processing system capable of determing send timing between an IC card and an accepting device' [patent_app_type] => 1 [patent_app_number] => 7/999799 [patent_app_country] => US [patent_app_date] => 1991-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 3135 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/414/05414835.pdf [firstpage_image] =>[orig_patent_app_number] => 999799 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2961820 [patent_doc_number] => 05222236 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-06-22 [patent_title] => 'Multiple integrated document assembly data processing system' [patent_app_type] => 1 [patent_app_number] => 7/751676 [patent_app_country] => US [patent_app_date] => 1991-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 27 [patent_no_of_words] => 12409 [patent_no_of_claims] => 62 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/222/05222236.pdf [firstpage_image] =>[orig_patent_app_number] => 751676 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2998973 [patent_doc_number] => 05212799 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-05-18 [patent_title] => 'Method and apparatus for storing a data block in multiple memory banks within a computer' [patent_app_type] => 1 [patent_app_number] => 7/739114 [patent_app_country] => US [patent_app_date] => 1991-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2338 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/212/05212799.pdf [firstpage_image] =>[orig_patent_app_number] => 739114 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3067007 [patent_doc_number] => 05345559 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-09-06 [patent_title] => 'Bus interface circuit for controlling data transfer' [patent_app_type] => 1 [patent_app_number] => 7/730809 [patent_app_country] => US [patent_app_date] => 1991-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 3424 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/345/05345559.pdf [firstpage_image] =>[orig_patent_app_number] => 730809 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3107906 [patent_doc_number] => 05291584 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-01 [patent_title] => 'Methods and apparatus for hard disk emulation' [patent_app_type] => 1 [patent_app_number] => 7/734414 [patent_app_country] => US [patent_app_date] => 1991-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 11235 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/291/05291584.pdf [firstpage_image] =>[orig_patent_app_number] => 734414 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3454164 [patent_doc_number] => 05430850 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-07-04 [patent_title] => 'Data processing system with synchronization coprocessor for multiple threads' [patent_app_type] => 1 [patent_app_number] => 7/734252 [patent_app_country] => US [patent_app_date] => 1991-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 17131 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/430/05430850.pdf [firstpage_image] =>[orig_patent_app_number] => 734252 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2945296 [patent_doc_number] => 05233698 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-03 [patent_title] => 'Method for operating data processors' [patent_app_type] => 1 [patent_app_number] => 7/724410 [patent_app_country] => US [patent_app_date] => 1991-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 34 [patent_no_of_words] => 12912 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/233/05233698.pdf [firstpage_image] =>[orig_patent_app_number] => 724410 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2977791 [patent_doc_number] => 05265260 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-23 [patent_title] => 'High performance sort hardware for a database accelerator in a data processing system' [patent_app_type] => 1 [patent_app_number] => 7/721023 [patent_app_country] => US [patent_app_date] => 1991-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5541 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 352 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/265/05265260.pdf [firstpage_image] =>[orig_patent_app_number] => 721023 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2902189 [patent_doc_number] => 05239659 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-24 [patent_title] => 'Phantom duplex copy group apparatus for a disk drive array data storge subsystem' [patent_app_type] => 1 [patent_app_number] => 7/717820 [patent_app_country] => US [patent_app_date] => 1991-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11975 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 317 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/239/05239659.pdf [firstpage_image] =>[orig_patent_app_number] => 717820 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2803955 [patent_doc_number] => 05136705 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-08-04 [patent_title] => 'Method of generating instruction sequences for controlling data flow processes' [patent_app_type] => 1 [patent_app_number] => 7/711723 [patent_app_country] => US [patent_app_date] => 1991-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 23 [patent_no_of_words] => 8067 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/136/05136705.pdf [firstpage_image] =>[orig_patent_app_number] => 711723 [rel_patent_id] =>[rel_patent_doc_number] =>)