Search

Aradhana Sasan

Examiner (ID: 18925, Phone: (571)272-9022 , Office: P/1615 )

Most Active Art Unit
1615
Art Unit(s)
1615
Total Applications
1310
Issued Applications
754
Pending Applications
115
Abandoned Applications
467

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2742613 [patent_doc_number] => 05051887 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-24 [patent_title] => 'Maintaining duplex-paired storage devices during gap processing using of a dual copy function' [patent_app_type] => 1 [patent_app_number] => 7/614983 [patent_app_country] => US [patent_app_date] => 1990-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6895 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 555 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/051/05051887.pdf [firstpage_image] =>[orig_patent_app_number] => 614983 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/614983
Maintaining duplex-paired storage devices during gap processing using of a dual copy function Nov 18, 1990 Issued
Array ( [id] => 2988901 [patent_doc_number] => 05226156 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-07-06 [patent_title] => 'Control and sequencing of data through multiple parallel processing devices' [patent_app_type] => 1 [patent_app_number] => 7/615662 [patent_app_country] => US [patent_app_date] => 1990-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 7519 [patent_no_of_claims] => 58 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/226/05226156.pdf [firstpage_image] =>[orig_patent_app_number] => 615662 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/615662
Control and sequencing of data through multiple parallel processing devices Nov 18, 1990 Issued
07/612956 NOTEBOOK COMPUTER WITH REVERSIBLE COVER FOR EXTERNAL USES OF MEMBRANE SWITCH SCREEN Nov 11, 1990 Abandoned
Array ( [id] => 2952238 [patent_doc_number] => 05261114 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-09 [patent_title] => 'Method and apparatus for providing down-loaded instructions for execution by a peripheral controller' [patent_app_type] => 1 [patent_app_number] => 7/612425 [patent_app_country] => US [patent_app_date] => 1990-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 14496 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/261/05261114.pdf [firstpage_image] =>[orig_patent_app_number] => 612425 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/612425
Method and apparatus for providing down-loaded instructions for execution by a peripheral controller Nov 8, 1990 Issued
Array ( [id] => 3058899 [patent_doc_number] => 05287489 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-15 [patent_title] => 'Method and system for authoring, editing and testing instructional materials for use in simulated trailing systems' [patent_app_type] => 1 [patent_app_number] => 7/605625 [patent_app_country] => US [patent_app_date] => 1990-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4603 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/287/05287489.pdf [firstpage_image] =>[orig_patent_app_number] => 605625 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/605625
Method and system for authoring, editing and testing instructional materials for use in simulated trailing systems Oct 29, 1990 Issued
07/602684 ELECTRONIC MAP COMBINED WITH USER SERVICE INFORMATION Oct 23, 1990 Abandoned
Array ( [id] => 2976763 [patent_doc_number] => 05265206 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-23 [patent_title] => 'System and method for implementing a messenger and object manager in an object oriented programming environment' [patent_app_type] => 1 [patent_app_number] => 7/602442 [patent_app_country] => US [patent_app_date] => 1990-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 25 [patent_no_of_words] => 10816 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/265/05265206.pdf [firstpage_image] =>[orig_patent_app_number] => 602442 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/602442
System and method for implementing a messenger and object manager in an object oriented programming environment Oct 22, 1990 Issued
Array ( [id] => 3024950 [patent_doc_number] => 05276877 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-04 [patent_title] => 'Dynamic computer system performance modeling interface' [patent_app_type] => 1 [patent_app_number] => 7/599221 [patent_app_country] => US [patent_app_date] => 1990-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 66 [patent_figures_cnt] => 76 [patent_no_of_words] => 18392 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/276/05276877.pdf [firstpage_image] =>[orig_patent_app_number] => 599221 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/599221
Dynamic computer system performance modeling interface Oct 16, 1990 Issued
Array ( [id] => 2843969 [patent_doc_number] => 05129079 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-07 [patent_title] => 'Computer system having subinstruction surveillance capability' [patent_app_type] => 1 [patent_app_number] => 7/596745 [patent_app_country] => US [patent_app_date] => 1990-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 5665 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/129/05129079.pdf [firstpage_image] =>[orig_patent_app_number] => 596745 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/596745
Computer system having subinstruction surveillance capability Oct 14, 1990 Issued
Array ( [id] => 3587265 [patent_doc_number] => 05524117 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-04 [patent_title] => 'Microcomputer system with watchdog monitoring of plural and dependent overlapping output therefrom' [patent_app_type] => 1 [patent_app_number] => 7/593559 [patent_app_country] => US [patent_app_date] => 1990-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4399 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/524/05524117.pdf [firstpage_image] =>[orig_patent_app_number] => 593559 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/593559
Microcomputer system with watchdog monitoring of plural and dependent overlapping output therefrom Oct 4, 1990 Issued
90/002127 DISPLAY SYSTEM FOR THE SUPPRESSION AND REGENERATION OF CHARACTERS IN A SERIES IN A STORED RECORD Sep 9, 1990 Issued
Array ( [id] => 3575849 [patent_doc_number] => 05526506 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-11 [patent_title] => 'Computer system having an improved memory architecture' [patent_app_type] => 1 [patent_app_number] => 7/578041 [patent_app_country] => US [patent_app_date] => 1990-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 60 [patent_no_of_words] => 117038 [patent_no_of_claims] => 76 [patent_no_of_ind_claims] => 22 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/526/05526506.pdf [firstpage_image] =>[orig_patent_app_number] => 578041 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/578041
Computer system having an improved memory architecture Sep 3, 1990 Issued
07/571953 RESPONDING TO SERVICE REQUEST USING MINIMAL SYSTEM-SIDE CONTEXT IN A MULTIPROCESSOR ENVIRONMENT Aug 22, 1990 Abandoned
Array ( [id] => 3471954 [patent_doc_number] => 05442764 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-15 [patent_title] => 'Digital signal processing having improved execution efficiency' [patent_app_type] => 1 [patent_app_number] => 7/570171 [patent_app_country] => US [patent_app_date] => 1990-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2680 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/442/05442764.pdf [firstpage_image] =>[orig_patent_app_number] => 570171 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/570171
Digital signal processing having improved execution efficiency Aug 19, 1990 Issued
Array ( [id] => 3024507 [patent_doc_number] => 05276854 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-04 [patent_title] => 'Method of multiple CPU logic simulation' [patent_app_type] => 1 [patent_app_number] => 7/570120 [patent_app_country] => US [patent_app_date] => 1990-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2876 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/276/05276854.pdf [firstpage_image] =>[orig_patent_app_number] => 570120 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/570120
Method of multiple CPU logic simulation Aug 16, 1990 Issued
Array ( [id] => 2788228 [patent_doc_number] => 05133062 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-21 [patent_title] => 'RAM buffer controller for providing simulated first-in-first-out (FIFO) buffers in a random access memory' [patent_app_type] => 1 [patent_app_number] => 7/566743 [patent_app_country] => US [patent_app_date] => 1990-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 19771 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/133/05133062.pdf [firstpage_image] =>[orig_patent_app_number] => 566743 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/566743
RAM buffer controller for providing simulated first-in-first-out (FIFO) buffers in a random access memory Aug 12, 1990 Issued
Array ( [id] => 2902152 [patent_doc_number] => 05239657 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-24 [patent_title] => 'Counted value storage system with recirculative addressing' [patent_app_type] => 1 [patent_app_number] => 7/556881 [patent_app_country] => US [patent_app_date] => 1990-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 2966 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/239/05239657.pdf [firstpage_image] =>[orig_patent_app_number] => 556881 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/556881
Counted value storage system with recirculative addressing Jul 22, 1990 Issued
Array ( [id] => 2742830 [patent_doc_number] => 05077656 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-31 [patent_title] => 'CPU channel to control unit extender' [patent_app_type] => 1 [patent_app_number] => 7/559516 [patent_app_country] => US [patent_app_date] => 1990-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 7991 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/077/05077656.pdf [firstpage_image] =>[orig_patent_app_number] => 559516 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/559516
CPU channel to control unit extender Jul 22, 1990 Issued
Array ( [id] => 3058396 [patent_doc_number] => 05287465 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-15 [patent_title] => 'Parallel processing apparatus and method capable of switching parallel and successive processing modes' [patent_app_type] => 1 [patent_app_number] => 7/549916 [patent_app_country] => US [patent_app_date] => 1990-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 34 [patent_no_of_words] => 10648 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/287/05287465.pdf [firstpage_image] =>[orig_patent_app_number] => 549916 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/549916
Parallel processing apparatus and method capable of switching parallel and successive processing modes Jul 8, 1990 Issued
Array ( [id] => 3589298 [patent_doc_number] => 05524251 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-04 [patent_title] => 'Microcomputer having ALU performing min and max operations' [patent_app_type] => 1 [patent_app_number] => 7/548571 [patent_app_country] => US [patent_app_date] => 1990-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3633 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/524/05524251.pdf [firstpage_image] =>[orig_patent_app_number] => 548571 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/548571
Microcomputer having ALU performing min and max operations Jul 4, 1990 Issued
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