| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 2181015
[patent_doc_number] => 04556958
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-12-03
[patent_title] => 'Device for single line bidirectional data transmission between an intelligent card\'s microprocessor and a second processor'
[patent_app_type] => 1
[patent_app_number] => 6/657471
[patent_app_country] => US
[patent_app_date] => 1984-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 4171
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 297
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/556/04556958.pdf
[firstpage_image] =>[orig_patent_app_number] => 657471
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/657471 | Device for single line bidirectional data transmission between an intelligent card's microprocessor and a second processor | Oct 3, 1984 | Issued |
| 06/656547 | PROGRAMMABLE UNIT HAVING PLURAL LEVELS OF SUBINSTRUCTION SETS WHERE A PORTION OF THE LOWER LEVEL IS EMBEDDED IN THE CODE STREAM OF THE UPPER LEVEL OF THE SUBINSTRUCTION SETS | Sep 30, 1984 | Abandoned |
Array
(
[id] => 2242620
[patent_doc_number] => 04586131
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-04-29
[patent_title] => 'Microcomputer having data move circuits for within-memory shift of data words'
[patent_app_type] => 1
[patent_app_number] => 6/654572
[patent_app_country] => US
[patent_app_date] => 1984-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 65
[patent_no_of_words] => 22348
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 224
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/586/04586131.pdf
[firstpage_image] =>[orig_patent_app_number] => 654572
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/654572 | Microcomputer having data move circuits for within-memory shift of data words | Sep 25, 1984 | Issued |
Array
(
[id] => 2145759
[patent_doc_number] => 04523297
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-06-11
[patent_title] => 'Hand-held processor with two-way dialog between microprocessor in case and microprocessor on carrier insertable into casing slot'
[patent_app_type] => 1
[patent_app_number] => 6/648607
[patent_app_country] => US
[patent_app_date] => 1984-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 13
[patent_no_of_words] => 5691
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 230
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/523/04523297.pdf
[firstpage_image] =>[orig_patent_app_number] => 648607
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/648607 | Hand-held processor with two-way dialog between microprocessor in case and microprocessor on carrier insertable into casing slot | Sep 6, 1984 | Issued |
Array
(
[id] => 2364806
[patent_doc_number] => 04648029
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-03-03
[patent_title] => 'Multiplexed interrupt/DMA request arbitration apparatus and method'
[patent_app_type] => 1
[patent_app_number] => 6/644882
[patent_app_country] => US
[patent_app_date] => 1984-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 12737
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/648/04648029.pdf
[firstpage_image] =>[orig_patent_app_number] => 644882
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/644882 | Multiplexed interrupt/DMA request arbitration apparatus and method | Aug 26, 1984 | Issued |
| 06/640540 | WORD PROCESSING APPARATUS FOR PROCESSING A SERIES OF CHARACTERS | Aug 13, 1984 | Abandoned |
Array
(
[id] => 2427870
[patent_doc_number] => 04727509
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-02-23
[patent_title] => 'Master/slave system for replicating/formatting flexible magnetic diskettes'
[patent_app_type] => 1
[patent_app_number] => 6/625781
[patent_app_country] => US
[patent_app_date] => 1984-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 46
[patent_figures_cnt] => 46
[patent_no_of_words] => 25353
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/727/04727509.pdf
[firstpage_image] =>[orig_patent_app_number] => 625781
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/625781 | Master/slave system for replicating/formatting flexible magnetic diskettes | Jun 27, 1984 | Issued |
| 06/625065 | DATA PROCESSOR HAVING SELECTIVE BREAKPOINT CAPABILITY WITH MINIMAL OVERHEAD | Jun 26, 1984 | Abandoned |
Array
(
[id] => 2451782
[patent_doc_number] => 04757443
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-07-12
[patent_title] => 'Data processing system with unified I/O control and adapted for display of graphics'
[patent_app_type] => 1
[patent_app_number] => 6/624077
[patent_app_country] => US
[patent_app_date] => 1984-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 208
[patent_figures_cnt] => 177
[patent_no_of_words] => 11823
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/757/04757443.pdf
[firstpage_image] =>[orig_patent_app_number] => 624077
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/624077 | Data processing system with unified I/O control and adapted for display of graphics | Jun 24, 1984 | Issued |
Array
(
[id] => 2349682
[patent_doc_number] => 04641263
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-02-03
[patent_title] => 'Controller system or emulating local parallel minicomputer/printer interface and transferring serial data to remote line printer'
[patent_app_type] => 1
[patent_app_number] => 6/618994
[patent_app_country] => US
[patent_app_date] => 1984-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 4195
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 410
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/641/04641263.pdf
[firstpage_image] =>[orig_patent_app_number] => 618994
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/618994 | Controller system or emulating local parallel minicomputer/printer interface and transferring serial data to remote line printer | Jun 10, 1984 | Issued |
Array
(
[id] => 2365028
[patent_doc_number] => 04694421
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-09-15
[patent_title] => 'Interface system which selectively provides impedance matching between a host computer and a control circuit'
[patent_app_type] => 1
[patent_app_number] => 6/617823
[patent_app_country] => US
[patent_app_date] => 1984-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1572
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 272
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/694/04694421.pdf
[firstpage_image] =>[orig_patent_app_number] => 617823
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/617823 | Interface system which selectively provides impedance matching between a host computer and a control circuit | Jun 4, 1984 | Issued |
Array
(
[id] => 2162305
[patent_doc_number] => 04525780
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-06-25
[patent_title] => 'Data processing system having a memory using object-based information and a protection scheme for determining access rights to such information'
[patent_app_type] => 1
[patent_app_number] => 6/616773
[patent_app_country] => US
[patent_app_date] => 1984-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 156
[patent_figures_cnt] => 200
[patent_no_of_words] => 300342
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 279
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/525/04525780.pdf
[firstpage_image] =>[orig_patent_app_number] => 616773
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/616773 | Data processing system having a memory using object-based information and a protection scheme for determining access rights to such information | May 30, 1984 | Issued |
Array
(
[id] => 2275510
[patent_doc_number] => 04584663
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-04-22
[patent_title] => 'Apparatus for power-on data integrity check of inputted characters stored in volatile memory'
[patent_app_type] => 1
[patent_app_number] => 6/615704
[patent_app_country] => US
[patent_app_date] => 1984-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2160
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 177
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/584/04584663.pdf
[firstpage_image] =>[orig_patent_app_number] => 615704
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/615704 | Apparatus for power-on data integrity check of inputted characters stored in volatile memory | May 28, 1984 | Issued |
| 06/607238 | AUTOMATED PROGRAMMING SYSTEM FOR MACHINE CREATION OF APPLICATIONS PROGRAM SOURCE CODE FROM NON-PROCEDURAL TERMINAL INPUT | May 3, 1984 | Abandoned |
Array
(
[id] => 2316802
[patent_doc_number] => 04638427
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-01-20
[patent_title] => 'Performance evaluation for an asymmetric multiprocessor system'
[patent_app_type] => 1
[patent_app_number] => 6/600622
[patent_app_country] => US
[patent_app_date] => 1984-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 6051
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/638/04638427.pdf
[firstpage_image] =>[orig_patent_app_number] => 600622
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/600622 | Performance evaluation for an asymmetric multiprocessor system | Apr 15, 1984 | Issued |
Array
(
[id] => 2240111
[patent_doc_number] => 04573141
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-02-25
[patent_title] => 'Memory interface for communicating between two storage media having incompatible data formats'
[patent_app_type] => 1
[patent_app_number] => 6/599683
[patent_app_country] => US
[patent_app_date] => 1984-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 4340
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 234
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/573/04573141.pdf
[firstpage_image] =>[orig_patent_app_number] => 599683
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/599683 | Memory interface for communicating between two storage media having incompatible data formats | Apr 11, 1984 | Issued |
Array
(
[id] => 2358609
[patent_doc_number] => 04654786
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-03-31
[patent_title] => 'Data processor using picosquencer to control execution of multi-instruction subroutines in a single fetch cycle'
[patent_app_type] => 1
[patent_app_number] => 6/598939
[patent_app_country] => US
[patent_app_date] => 1984-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 28
[patent_no_of_words] => 19761
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/654/04654786.pdf
[firstpage_image] =>[orig_patent_app_number] => 598939
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/598939 | Data processor using picosquencer to control execution of multi-instruction subroutines in a single fetch cycle | Apr 10, 1984 | Issued |
Array
(
[id] => 2316878
[patent_doc_number] => 04638432
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-01-20
[patent_title] => 'Apparatus for controlling the transfer of interrupt signals in data processors'
[patent_app_type] => 1
[patent_app_number] => 6/598469
[patent_app_country] => US
[patent_app_date] => 1984-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2795
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 249
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/638/04638432.pdf
[firstpage_image] =>[orig_patent_app_number] => 598469
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/598469 | Apparatus for controlling the transfer of interrupt signals in data processors | Apr 8, 1984 | Issued |
Array
(
[id] => 2358640
[patent_doc_number] => 04654789
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-03-31
[patent_title] => 'LSI microprocessor chip with backward pin compatibility'
[patent_app_type] => 1
[patent_app_number] => 6/596756
[patent_app_country] => US
[patent_app_date] => 1984-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 14
[patent_no_of_words] => 4580
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/654/04654789.pdf
[firstpage_image] =>[orig_patent_app_number] => 596756
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/596756 | LSI microprocessor chip with backward pin compatibility | Apr 3, 1984 | Issued |
Array
(
[id] => 2397836
[patent_doc_number] => 04663734
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-05-05
[patent_title] => 'Print pulse controller for a termal printhead'
[patent_app_type] => 1
[patent_app_number] => 6/595983
[patent_app_country] => US
[patent_app_date] => 1984-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 7436
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 28
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/663/04663734.pdf
[firstpage_image] =>[orig_patent_app_number] => 595983
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/595983 | Print pulse controller for a termal printhead | Apr 1, 1984 | Issued |