Search

Archie E. Williams Jr.

Examiner (ID: 11265)

Most Active Art Unit
2302
Art Unit(s)
2302, 2307
Total Applications
295
Issued Applications
236
Pending Applications
0
Abandoned Applications
59

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2363890 [patent_doc_number] => 04658354 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-04-14 [patent_title] => 'Pipeline processing apparatus having a test function' [patent_app_type] => 1 [patent_app_number] => 6/499705 [patent_app_country] => US [patent_app_date] => 1983-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 6886 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 439 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/658/04658354.pdf [firstpage_image] =>[orig_patent_app_number] => 499705 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/499705
Pipeline processing apparatus having a test function May 30, 1983 Issued
Array ( [id] => 2262026 [patent_doc_number] => 04589067 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-05-13 [patent_title] => 'Full floating point vector processor with dynamically configurable multifunction pipelined ALU' [patent_app_type] => 1 [patent_app_number] => 6/498877 [patent_app_country] => US [patent_app_date] => 1983-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 7687 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/589/04589067.pdf [firstpage_image] =>[orig_patent_app_number] => 498877 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/498877
Full floating point vector processor with dynamically configurable multifunction pipelined ALU May 26, 1983 Issued
Array ( [id] => 2130241 [patent_doc_number] => 04482953 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-11-13 [patent_title] => 'Computer with console addressable PLA storing control microcode and microinstructions for self-test of internal registers and ALU' [patent_app_type] => 1 [patent_app_number] => 6/495735 [patent_app_country] => US [patent_app_date] => 1983-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 73 [patent_no_of_words] => 28144 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/482/04482953.pdf [firstpage_image] =>[orig_patent_app_number] => 495735 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/495735
Computer with console addressable PLA storing control microcode and microinstructions for self-test of internal registers and ALU May 22, 1983 Issued
Array ( [id] => 2290959 [patent_doc_number] => 04604725 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-08-05 [patent_title] => 'Rotary apparatus having code track with pseudo-random binary digit sequence for indicating rotational position' [patent_app_type] => 1 [patent_app_number] => 6/495389 [patent_app_country] => US [patent_app_date] => 1983-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2144 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/604/04604725.pdf [firstpage_image] =>[orig_patent_app_number] => 495389 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/495389
Rotary apparatus having code track with pseudo-random binary digit sequence for indicating rotational position May 16, 1983 Issued
06/495214 APPARATUS GUARANTEEING THAT A CONTROLLER IN A DISK DRIVE SYSTEM RECEIVES AT LEAST SOME DATA FROM AN INVALID TRACK SECTOR May 15, 1983 Abandoned
06/493403 WORD PROCESSING SYSTEM BASED ON A DATA STREAM HAVING INTEGRATED ALPHANUMERIC AND GRAPHIC DATA May 10, 1983 Abandoned
06/488000 DATA RELAY SYSTEM May 1, 1983 Abandoned
06/488083 FLEXIBLE CHAINING IN A VECTOR PROCESSOR WITH SELECTIVE USE OF VECTOR REGISTERS AS OPERAND AND RESULT REGISTERS Apr 24, 1983 Abandoned
Array ( [id] => 2224909 [patent_doc_number] => 04595996 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-06-17 [patent_title] => 'Programmable video display character control circuit using multi-purpose RAM for display attributes, character generator, and refresh memory' [patent_app_type] => 1 [patent_app_number] => 6/488484 [patent_app_country] => US [patent_app_date] => 1983-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3667 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/595/04595996.pdf [firstpage_image] =>[orig_patent_app_number] => 488484 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/488484
Programmable video display character control circuit using multi-purpose RAM for display attributes, character generator, and refresh memory Apr 24, 1983 Issued
Array ( [id] => 2270495 [patent_doc_number] => 04593376 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-06-03 [patent_title] => 'System for vending program cartridges which have circuitry for inhibiting program usage after preset time interval expires' [patent_app_type] => 1 [patent_app_number] => 6/487018 [patent_app_country] => US [patent_app_date] => 1983-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 6278 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/593/04593376.pdf [firstpage_image] =>[orig_patent_app_number] => 487018 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/487018
System for vending program cartridges which have circuitry for inhibiting program usage after preset time interval expires Apr 20, 1983 Issued
Array ( [id] => 2072381 [patent_doc_number] => 04430711 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-02-07 [patent_title] => 'Central processing unit' [patent_app_type] => 1 [patent_app_number] => 6/482818 [patent_app_country] => US [patent_app_date] => 1983-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 7391 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 350 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/430/04430711.pdf [firstpage_image] =>[orig_patent_app_number] => 482818 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/482818
Central processing unit Apr 6, 1983 Issued
Array ( [id] => 2269245 [patent_doc_number] => 04580242 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-04-01 [patent_title] => 'Information output system having controlled data formatting for each terminal unit' [patent_app_type] => 1 [patent_app_number] => 6/482803 [patent_app_country] => US [patent_app_date] => 1983-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 8421 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/580/04580242.pdf [firstpage_image] =>[orig_patent_app_number] => 482803 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/482803
Information output system having controlled data formatting for each terminal unit Apr 6, 1983 Issued
Array ( [id] => 2243026 [patent_doc_number] => 04586160 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-04-29 [patent_title] => 'Method and apparatus for analyzing the syntactic structure of a sentence' [patent_app_type] => 1 [patent_app_number] => 6/482195 [patent_app_country] => US [patent_app_date] => 1983-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3284 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 327 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/586/04586160.pdf [firstpage_image] =>[orig_patent_app_number] => 482195 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/482195
Method and apparatus for analyzing the syntactic structure of a sentence Apr 4, 1983 Issued
Array ( [id] => 2220737 [patent_doc_number] => 04615002 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-09-30 [patent_title] => 'Concurrent multi-lingual use in data processing system' [patent_app_type] => 1 [patent_app_number] => 6/480418 [patent_app_country] => US [patent_app_date] => 1983-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5774 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/615/04615002.pdf [firstpage_image] =>[orig_patent_app_number] => 480418 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/480418
Concurrent multi-lingual use in data processing system Mar 29, 1983 Issued
Array ( [id] => 2148358 [patent_doc_number] => 04536838 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-08-20 [patent_title] => 'Multi-processor system with communication controller using poll flags for non-contentious slot reservation' [patent_app_type] => 1 [patent_app_number] => 6/478604 [patent_app_country] => US [patent_app_date] => 1983-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3488 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/536/04536838.pdf [firstpage_image] =>[orig_patent_app_number] => 478604 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/478604
Multi-processor system with communication controller using poll flags for non-contentious slot reservation Mar 23, 1983 Issued
Array ( [id] => 2163819 [patent_doc_number] => 04521858 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-06-04 [patent_title] => 'Flexible addressing and sequencing system for operand memory and control store using dedicated micro-address registers loaded solely from alu' [patent_app_type] => 1 [patent_app_number] => 6/474271 [patent_app_country] => US [patent_app_date] => 1983-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4352 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/521/04521858.pdf [firstpage_image] =>[orig_patent_app_number] => 474271 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/474271
Flexible addressing and sequencing system for operand memory and control store using dedicated micro-address registers loaded solely from alu Mar 10, 1983 Issued
Array ( [id] => 2148541 [patent_doc_number] => 04536857 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-08-20 [patent_title] => 'Device for the serial merging of two ordered lists in order to form a single ordered list' [patent_app_type] => 1 [patent_app_number] => 6/471974 [patent_app_country] => US [patent_app_date] => 1983-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 10886 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/536/04536857.pdf [firstpage_image] =>[orig_patent_app_number] => 471974 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/471974
Device for the serial merging of two ordered lists in order to form a single ordered list Mar 3, 1983 Issued
Array ( [id] => 2247652 [patent_doc_number] => 04567573 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-01-28 [patent_title] => 'Electronic language interpreter with faculties for memorizing and erasing new words externally applied thereto' [patent_app_type] => 1 [patent_app_number] => 6/472269 [patent_app_country] => US [patent_app_date] => 1983-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5028 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 292 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/567/04567573.pdf [firstpage_image] =>[orig_patent_app_number] => 472269 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/472269
Electronic language interpreter with faculties for memorizing and erasing new words externally applied thereto Mar 3, 1983 Issued
06/470126 PRIORITIZED SECONDARY USE OF A CACHE Feb 27, 1983 Abandoned
Array ( [id] => 2138465 [patent_doc_number] => 04551799 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-11-05 [patent_title] => 'Verification of real page numbers of stack stored prefetched instructions from instruction cache' [patent_app_type] => 1 [patent_app_number] => 6/470125 [patent_app_country] => US [patent_app_date] => 1983-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10708 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/551/04551799.pdf [firstpage_image] =>[orig_patent_app_number] => 470125 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/470125
Verification of real page numbers of stack stored prefetched instructions from instruction cache Feb 27, 1983 Issued
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