| Application number | Title of the application | Filing Date | Status |
|---|
Array
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[patent_doc_number] => 04553223
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-11-12
[patent_title] => 'Static disturbance signal recording system having detachable programming terminal & programmable fixed part with selectively powered buffer memory'
[patent_app_type] => 1
[patent_app_number] => 6/395313
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[firstpage_image] =>[orig_patent_app_number] => 395313
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/395313 | Static disturbance signal recording system having detachable programming terminal & programmable fixed part with selectively powered buffer memory | Jul 5, 1982 | Issued |
| 06/393836 | SPELLING VERIFICATION METHOD FOR A TYPEWRITER AND TYPEWRITER EMBODYING SAID METHOD | Jun 29, 1982 | Abandoned |
Array
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[patent_doc_number] => 04578751
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[patent_kind] => NA
[patent_issue_date] => 1986-03-25
[patent_title] => 'System for simultaneously programming a number of EPROMs'
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[patent_app_number] => 6/392053
[patent_app_country] => US
[patent_app_date] => 1982-06-25
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[firstpage_image] =>[orig_patent_app_number] => 392053
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/392053 | System for simultaneously programming a number of EPROMs | Jun 24, 1982 | Issued |
Array
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[id] => 2202967
[patent_doc_number] => 04495574
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-01-22
[patent_title] => 'Bidirectional multi-mode data transfer bus system'
[patent_app_type] => 1
[patent_app_number] => 6/391705
[patent_app_country] => US
[patent_app_date] => 1982-06-24
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[rel_patent_id] =>[rel_patent_doc_number] =>) 06/391705 | Bidirectional multi-mode data transfer bus system | Jun 23, 1982 | Issued |
Array
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[id] => 2145455
[patent_doc_number] => 04523271
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-06-11
[patent_title] => 'Software protection method and apparatus'
[patent_app_type] => 1
[patent_app_number] => 6/390885
[patent_app_country] => US
[patent_app_date] => 1982-06-22
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 390885
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/390885 | Software protection method and apparatus | Jun 21, 1982 | Issued |
| 06/378793 | SYSTEM FOR TRANSMITTING COMPUTER-GENERATED DATA TO A REMOTE LOCATION | May 16, 1982 | Abandoned |
Array
(
[id] => 2173191
[patent_doc_number] => 04541076
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[patent_kind] => NA
[patent_issue_date] => 1985-09-10
[patent_title] => 'Dual port CMOS random access memory'
[patent_app_type] => 1
[patent_app_number] => 6/377847
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[patent_app_date] => 1982-05-13
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[firstpage_image] =>[orig_patent_app_number] => 377847
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/377847 | Dual port CMOS random access memory | May 12, 1982 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 06/361499 | Cache arrangement for direct memory access block transfer | Mar 24, 1982 | Issued |
Array
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[patent_issue_date] => 1985-07-16
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[patent_app_type] => 1
[patent_app_number] => 6/354559
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[pdf_file] => patents/04/530/04530055.pdf
[firstpage_image] =>[orig_patent_app_number] => 354559
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/354559 | Hierarchical memory system with variable regulation and priority of writeback from cache memory to bulk memory | Mar 2, 1982 | Issued |
Array
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[id] => 2556516
[patent_doc_number] => 04811203
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[patent_issue_date] => 1989-03-07
[patent_title] => 'Hierarchial memory system with separate criteria for replacement and writeback without replacement'
[patent_app_type] => 1
[patent_app_number] => 6/354558
[patent_app_country] => US
[patent_app_date] => 1982-03-03
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[pdf_file] => patents/04/811/04811203.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 06/354558 | Hierarchial memory system with separate criteria for replacement and writeback without replacement | Mar 2, 1982 | Issued |
Array
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[id] => 2182960
[patent_doc_number] => 04530054
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-07-16
[patent_title] => 'Processor-addressable timestamp for indicating oldest written-to cache entry not copied back to bulk memory'
[patent_app_type] => 1
[patent_app_number] => 6/354556
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[rel_patent_id] =>[rel_patent_doc_number] =>) 06/354556 | Processor-addressable timestamp for indicating oldest written-to cache entry not copied back to bulk memory | Mar 2, 1982 | Issued |
Array
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[id] => 2137745
[patent_doc_number] => 04491910
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-01-01
[patent_title] => 'Microcomputer having data shift within memory'
[patent_app_type] => 1
[patent_app_number] => 6/350951
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[patent_app_date] => 1982-02-22
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[pdf_file] => patents/04/491/04491910.pdf
[firstpage_image] =>[orig_patent_app_number] => 350951
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/350951 | Microcomputer having data shift within memory | Feb 21, 1982 | Issued |
| 06/350159 | DISTRIBUTED DATA PROCESSING SYSTEM | Feb 18, 1982 | Abandoned |
Array
(
[id] => 2110943
[patent_doc_number] => 04472790
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-09-18
[patent_title] => 'Storage fetch protect override controls'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 06/345961 | Storage fetch protect override controls | Feb 4, 1982 | Issued |
Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 06/337674 | Dynamic priority queue occupancy scheme for access to a demand-shared bus | Jan 6, 1982 | Issued |
Array
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