| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 2146844
[patent_doc_number] => 04499536
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-02-12
[patent_title] => 'Signal transfer timing control using stored data relating to operating speeds of memory and processor'
[patent_app_type] => 1
[patent_app_number] => 6/329048
[patent_app_country] => US
[patent_app_date] => 1981-12-09
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/04/499/04499536.pdf
[firstpage_image] =>[orig_patent_app_number] => 329048
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/329048 | Signal transfer timing control using stored data relating to operating speeds of memory and processor | Dec 8, 1981 | Issued |
Array
(
[id] => 2130225
[patent_doc_number] => 04482952
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-11-13
[patent_title] => 'Virtual addressing system using page field comparisons to selectively validate cache buffer data on read main memory data'
[patent_app_type] => 1
[patent_app_number] => 6/328774
[patent_app_country] => US
[patent_app_date] => 1981-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 11637
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/482/04482952.pdf
[firstpage_image] =>[orig_patent_app_number] => 328774
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/328774 | Virtual addressing system using page field comparisons to selectively validate cache buffer data on read main memory data | Dec 7, 1981 | Issued |
Array
(
[id] => 2094072
[patent_doc_number] => 04464733
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-08-07
[patent_title] => 'Office system comprising terminals, a data processor and auxiliary apparatus and a switching device for mass data transport between the auxiliary apparatus'
[patent_app_type] => 1
[patent_app_number] => 6/323620
[patent_app_country] => US
[patent_app_date] => 1981-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 9234
[patent_no_of_claims] => 4
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[patent_words_short_claim] => 91
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/464/04464733.pdf
[firstpage_image] =>[orig_patent_app_number] => 323620
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/323620 | Office system comprising terminals, a data processor and auxiliary apparatus and a switching device for mass data transport between the auxiliary apparatus | Nov 19, 1981 | Issued |
Array
(
[id] => 2104589
[patent_doc_number] => 04470110
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-09-04
[patent_title] => 'System for distributed priority arbitration among several processing units competing for access to a common data channel'
[patent_app_type] => 1
[patent_app_number] => 6/318254
[patent_app_country] => US
[patent_app_date] => 1981-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 3445
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 368
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/470/04470110.pdf
[firstpage_image] =>[orig_patent_app_number] => 318254
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/318254 | System for distributed priority arbitration among several processing units competing for access to a common data channel | Nov 3, 1981 | Issued |
Array
(
[id] => 2197895
[patent_doc_number] => 04511958
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-04-16
[patent_title] => 'Common bus access system using plural configuration tables for failure tolerant token passing among processors'
[patent_app_type] => 1
[patent_app_number] => 6/314733
[patent_app_country] => US
[patent_app_date] => 1981-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 14
[patent_no_of_words] => 8136
[patent_no_of_claims] => 23
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[patent_words_short_claim] => 354
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/511/04511958.pdf
[firstpage_image] =>[orig_patent_app_number] => 314733
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/314733 | Common bus access system using plural configuration tables for failure tolerant token passing among processors | Oct 25, 1981 | Issued |
| 06/314033 | ELECTRONIC TRANSLATOR FOR MODIFYING THE DEFINITE ARTICLES OR PREPOSITIONS IN ACCORDANCE WITH MODIFYING RELATED WORDS | Oct 21, 1981 | Abandoned |
Array
(
[id] => 2560875
[patent_doc_number] => 04807123
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-02-21
[patent_title] => 'Programmable system for inputting & Processing data using visually perceptible data entry frames'
[patent_app_type] => 1
[patent_app_number] => 6/312899
[patent_app_country] => US
[patent_app_date] => 1981-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[pdf_file] => patents/04/807/04807123.pdf
[firstpage_image] =>[orig_patent_app_number] => 312899
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/312899 | Programmable system for inputting & Processing data using visually perceptible data entry frames | Oct 18, 1981 | Issued |
| 06/312707 | AERIAL DEVICE PROTECTION | Oct 18, 1981 | Abandoned |
Array
(
[id] => 2166853
[patent_doc_number] => 04500954
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-02-19
[patent_title] => 'Cache bypass system with post-block transfer directory examinations for updating cache and/or maintaining bypass'
[patent_app_type] => 1
[patent_app_number] => 6/311570
[patent_app_country] => US
[patent_app_date] => 1981-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5517
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 203
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/500/04500954.pdf
[firstpage_image] =>[orig_patent_app_number] => 311570
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/311570 | Cache bypass system with post-block transfer directory examinations for updating cache and/or maintaining bypass | Oct 14, 1981 | Issued |
| 06/309047 | VOLTAGE LEVEL COMPENSATING INTERFACE CIRCUIT | Oct 5, 1981 | Abandoned |
Array
(
[id] => 2104581
[patent_doc_number] => 04470109
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-09-04
[patent_title] => 'Real-time data sampling with memory sharing by high speed I/O processor and cycle stealing support processor'
[patent_app_type] => 1
[patent_app_number] => 6/307251
[patent_app_country] => US
[patent_app_date] => 1981-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 1921
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 211
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/470/04470109.pdf
[firstpage_image] =>[orig_patent_app_number] => 307251
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/307251 | Real-time data sampling with memory sharing by high speed I/O processor and cycle stealing support processor | Sep 29, 1981 | Issued |
| 06/305122 | CENTRAL PROCESSOR UTILIZATION MONITOR | Sep 23, 1981 | Abandoned |
| 06/305044 | WORD PROCESSING APPARATUS | Sep 22, 1981 | Abandoned |
Array
(
[id] => 2133590
[patent_doc_number] => 04543631
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-09-24
[patent_title] => 'Japanese text inputting system having interactive mnemonic mode and display choice mode'
[patent_app_type] => 1
[patent_app_number] => 6/304611
[patent_app_country] => US
[patent_app_date] => 1981-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/543/04543631.pdf
[firstpage_image] =>[orig_patent_app_number] => 304611
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/304611 | Japanese text inputting system having interactive mnemonic mode and display choice mode | Sep 21, 1981 | Issued |
Array
(
[id] => 2076122
[patent_doc_number] => 04463432
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-07-31
[patent_title] => 'Power controller using dual deadbands for reducing oscillatory load manipulations'
[patent_app_type] => 1
[patent_app_number] => 6/296277
[patent_app_country] => US
[patent_app_date] => 1981-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 14979
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/463/04463432.pdf
[firstpage_image] =>[orig_patent_app_number] => 296277
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/296277 | Power controller using dual deadbands for reducing oscillatory load manipulations | Aug 25, 1981 | Issued |
| 06/295870 | MEMORY DATA COINCIDENCE DEVICE | Aug 24, 1981 | Abandoned |
Array
(
[id] => 2164030
[patent_doc_number] => 04554630
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-11-19
[patent_title] => 'Control apparatus for back-driving computer memory and forcing execution of idle loop program in external memory'
[patent_app_type] => 1
[patent_app_number] => 6/295765
[patent_app_country] => US
[patent_app_date] => 1981-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 6196
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/554/04554630.pdf
[firstpage_image] =>[orig_patent_app_number] => 295765
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/295765 | Control apparatus for back-driving computer memory and forcing execution of idle loop program in external memory | Aug 23, 1981 | Issued |
| 06/293453 | BID CONTROL CIRCUIT FOR TIME-SHARED BUS | Aug 16, 1981 | Abandoned |
Array
(
[id] => 2063613
[patent_doc_number] => 04433391
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-02-21
[patent_title] => 'Buffered handshake bus with transmission and response counters for avoiding receiver overflow'
[patent_app_type] => 1
[patent_app_number] => 6/293494
[patent_app_country] => US
[patent_app_date] => 1981-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/04/433/04433391.pdf
[firstpage_image] =>[orig_patent_app_number] => 293494
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/293494 | Buffered handshake bus with transmission and response counters for avoiding receiver overflow | Aug 16, 1981 | Issued |
Array
(
[id] => 2104691
[patent_doc_number] => 04470121
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-09-04
[patent_title] => 'Multi-frequency vibration controller using fluid-filled cantilever beam for vibration excitation & absorption'
[patent_app_type] => 1
[patent_app_number] => 6/293733
[patent_app_country] => US
[patent_app_date] => 1981-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/470/04470121.pdf
[firstpage_image] =>[orig_patent_app_number] => 293733
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/293733 | Multi-frequency vibration controller using fluid-filled cantilever beam for vibration excitation & absorption | Aug 16, 1981 | Issued |