Search

Arezoo Sherkat

Examiner (ID: 12013)

Most Active Art Unit
2434
Art Unit(s)
2494, IPBS, 2431, 2131, 2434
Total Applications
370
Issued Applications
274
Pending Applications
15
Abandoned Applications
81

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20442356 [patent_doc_number] => 12513199 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-30 [patent_title] => Method and electronic device for managing sensitive data based on semantic categorization [patent_app_type] => utility [patent_app_number] => 19/232533 [patent_app_country] => US [patent_app_date] => 2025-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2065 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19232533 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/232533
Method and electronic device for managing sensitive data based on semantic categorization Jun 8, 2025 Issued
Array ( [id] => 20052407 [patent_doc_number] => 20250190629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => BLOCKCHAIN-BASED DATA PROCESSING METHOD, DEVICE, AND READABLE STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 19/049956 [patent_app_country] => US [patent_app_date] => 2025-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10962 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19049956 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/049956
BLOCKCHAIN-BASED DATA PROCESSING METHOD, DEVICE, AND READABLE STORAGE MEDIUM Feb 9, 2025 Pending
Array ( [id] => 20139850 [patent_doc_number] => 20250246894 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-31 [patent_title] => PROTECTIVE RELAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/991872 [patent_app_country] => US [patent_app_date] => 2024-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9606 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18991872 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/991872
PROTECTIVE RELAY DEVICE Dec 22, 2024 Pending
Array ( [id] => 20070992 [patent_doc_number] => 20250209214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-26 [patent_title] => Setting Method Of Root File System Of Computer And Computer Program [patent_app_type] => utility [patent_app_number] => 18/991963 [patent_app_country] => US [patent_app_date] => 2024-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18991963 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/991963
Setting Method Of Root File System Of Computer And Computer Program Dec 22, 2024 Pending
Array ( [id] => 19805520 [patent_doc_number] => 20250071445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => Memory Usage Configurations for Integrated Circuit Devices having Analog Inference Capability [patent_app_type] => utility [patent_app_number] => 18/944542 [patent_app_country] => US [patent_app_date] => 2024-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23867 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18944542 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/944542
Memory Usage Configurations for Integrated Circuit Devices having Analog Inference Capability Nov 11, 2024 Pending
Array ( [id] => 20012230 [patent_doc_number] => 20250150452 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => SYSTEM FOR ESTABLISHING A COMMUNICATION CONNECTION BETWEEN A FIRST DEVICE AND A SERVER VIA A NETWORK AND METHOD FOR AUTHORIZING A CONFIGURATION OF A FIRST DEVICE BY A SECOND DEVICE [patent_app_type] => utility [patent_app_number] => 18/939599 [patent_app_country] => US [patent_app_date] => 2024-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18939599 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/939599
SYSTEM FOR ESTABLISHING A COMMUNICATION CONNECTION BETWEEN A FIRST DEVICE AND A SERVER VIA A NETWORK AND METHOD FOR AUTHORIZING A CONFIGURATION OF A FIRST DEVICE BY A SECOND DEVICE Nov 6, 2024 Pending
Array ( [id] => 20010879 [patent_doc_number] => 20250149101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => VOLTAGE REGULATION FOR MEMORY ARRAY TEST PROCEDURES [patent_app_type] => utility [patent_app_number] => 18/937401 [patent_app_country] => US [patent_app_date] => 2024-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5971 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18937401 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/937401
VOLTAGE REGULATION FOR MEMORY ARRAY TEST PROCEDURES Nov 4, 2024 Pending
Array ( [id] => 20681941 [patent_doc_number] => 20260120766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-30 [patent_title] => RECURSIVE ANALOG CONTENT ADDRESSABLE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/933512 [patent_app_country] => US [patent_app_date] => 2024-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3546 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18933512 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/933512
RECURSIVE ANALOG CONTENT ADDRESSABLE MEMORY DEVICE Oct 30, 2024 Pending
Array ( [id] => 20683665 [patent_doc_number] => 20260122498 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-30 [patent_title] => IPSEC SEQUENCE SYNCHRONIZATION AND RECOVERY IN SOFTWARE-DEFINED WIDE AREA NETWORK(S) [patent_app_type] => utility [patent_app_number] => 18/933031 [patent_app_country] => US [patent_app_date] => 2024-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5939 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18933031 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/933031
IPSEC SEQUENCE SYNCHRONIZATION AND RECOVERY IN SOFTWARE-DEFINED WIDE AREA NETWORK(S) Oct 30, 2024 Pending
Array ( [id] => 20019321 [patent_doc_number] => 20250157543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => MEMORY DEVICE AND OPERATING METHOD OF THE SAME [patent_app_type] => utility [patent_app_number] => 18/933556 [patent_app_country] => US [patent_app_date] => 2024-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10063 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18933556 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/933556
MEMORY DEVICE AND OPERATING METHOD OF THE SAME Oct 30, 2024 Pending
Array ( [id] => 20641261 [patent_doc_number] => 20260099618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-09 [patent_title] => SYSTEMS AND METHODS FOR ACCESS CONTROL POLICY MANAGEMENT [patent_app_type] => utility [patent_app_number] => 18/910560 [patent_app_country] => US [patent_app_date] => 2024-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8107 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18910560 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/910560
SYSTEMS AND METHODS FOR ACCESS CONTROL POLICY MANAGEMENT Oct 8, 2024 Issued
Array ( [id] => 19866007 [patent_doc_number] => 20250104793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => READ DESTRUCTIVE MEMORY WEAR LEVELING SYSTEM [patent_app_type] => utility [patent_app_number] => 18/907337 [patent_app_country] => US [patent_app_date] => 2024-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22270 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18907337 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/907337
READ DESTRUCTIVE MEMORY WEAR LEVELING SYSTEM Oct 3, 2024 Pending
Array ( [id] => 19712354 [patent_doc_number] => 20250022496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => APPARATUSES AND METHODS FOR SETTING A DUTY CYCLE ADJUSTER FOR IMPROVING CLOCK DUTY CYCLE [patent_app_type] => utility [patent_app_number] => 18/903238 [patent_app_country] => US [patent_app_date] => 2024-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16581 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18903238 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/903238
APPARATUSES AND METHODS FOR SETTING A DUTY CYCLE ADJUSTER FOR IMPROVING CLOCK DUTY CYCLE Sep 30, 2024 Pending
Array ( [id] => 20630368 [patent_doc_number] => 20260094656 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-02 [patent_title] => CIRCUIT AND METHOD FOR ACCURATELY CLAMPING SOURCE-TO-DRAIN VOLTAGE OF EPROM BIT-CELL [patent_app_type] => utility [patent_app_number] => 18/898944 [patent_app_country] => US [patent_app_date] => 2024-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2132 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18898944 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/898944
CIRCUIT AND METHOD FOR ACCURATELY CLAMPING SOURCE-TO-DRAIN VOLTAGE OF EPROM BIT-CELL Sep 26, 2024 Pending
Array ( [id] => 19893069 [patent_doc_number] => 20250118381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => NONVOLATILE MEMORY DEVICE AND PASS-FAIL CHECK METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/899546 [patent_app_country] => US [patent_app_date] => 2024-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13967 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18899546 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/899546
NONVOLATILE MEMORY DEVICE AND PASS-FAIL CHECK METHOD THEREOF Sep 26, 2024 Pending
Array ( [id] => 20291068 [patent_doc_number] => 20250316311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-09 [patent_title] => NONVOLATILE MEMORY DEVICE, OPERATING METHOD OF NONVOLATILE MEMORY DEVICE, AND MEMORY SYSTEM INCLUDING NONVOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/898990 [patent_app_country] => US [patent_app_date] => 2024-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8550 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18898990 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/898990
NONVOLATILE MEMORY DEVICE, OPERATING METHOD OF NONVOLATILE MEMORY DEVICE, AND MEMORY SYSTEM INCLUDING NONVOLATILE MEMORY DEVICE Sep 26, 2024 Pending
Array ( [id] => 19696088 [patent_doc_number] => 20250014633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => MEMORY [patent_app_type] => utility [patent_app_number] => 18/890760 [patent_app_country] => US [patent_app_date] => 2024-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9980 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18890760 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/890760
MEMORY Sep 19, 2024 Pending
Array ( [id] => 19695221 [patent_doc_number] => 20250013766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => SERVERLESS IDENTITY MANAGEMENT [patent_app_type] => utility [patent_app_number] => 18/887978 [patent_app_country] => US [patent_app_date] => 2024-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9805 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18887978 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/887978
SERVERLESS IDENTITY MANAGEMENT Sep 16, 2024 Pending
Array ( [id] => 19850341 [patent_doc_number] => 20250095692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/884849 [patent_app_country] => US [patent_app_date] => 2024-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17175 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18884849 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/884849
SEMICONDUCTOR MEMORY DEVICE Sep 12, 2024 Pending
Array ( [id] => 19661774 [patent_doc_number] => 20240428839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => APPARATUSES, SYSTEMS, AND METHODS FOR CONFIGURABLE MEMORY [patent_app_type] => utility [patent_app_number] => 18/826719 [patent_app_country] => US [patent_app_date] => 2024-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8880 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18826719 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/826719
APPARATUSES, SYSTEMS, AND METHODS FOR CONFIGURABLE MEMORY Sep 5, 2024 Pending
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