Search

Arezoo Sherkat

Examiner (ID: 12013)

Most Active Art Unit
2434
Art Unit(s)
2494, IPBS, 2431, 2131, 2434
Total Applications
370
Issued Applications
274
Pending Applications
15
Abandoned Applications
81

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18424935 [patent_doc_number] => 20230179400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => KEY MANAGEMENT METHOD AND COMMUNICATION APPARATUS [patent_app_type] => utility [patent_app_number] => 18/163980 [patent_app_country] => US [patent_app_date] => 2023-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 32660 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18163980 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/163980
Key management method and communication apparatus Feb 2, 2023 Issued
Array ( [id] => 19765740 [patent_doc_number] => 12224039 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-11 [patent_title] => Address signal transmission circuit, address signal transmission method and storage system [patent_app_type] => utility [patent_app_number] => 18/163323 [patent_app_country] => US [patent_app_date] => 2023-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10068 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18163323 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/163323
Address signal transmission circuit, address signal transmission method and storage system Feb 1, 2023 Issued
Array ( [id] => 18423670 [patent_doc_number] => 20230178134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => OXIDE SEMICONDUCTOR-BASED FRAM [patent_app_type] => utility [patent_app_number] => 18/103500 [patent_app_country] => US [patent_app_date] => 2023-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4655 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18103500 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/103500
Oxide semiconductor-based FRAM Jan 30, 2023 Issued
Array ( [id] => 18983328 [patent_doc_number] => 11908513 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-20 [patent_title] => Neural memory array storing synapsis weights in differential cell pairs [patent_app_type] => utility [patent_app_number] => 18/103383 [patent_app_country] => US [patent_app_date] => 2023-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 41 [patent_no_of_words] => 13346 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18103383 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/103383
Neural memory array storing synapsis weights in differential cell pairs Jan 29, 2023 Issued
Array ( [id] => 18394557 [patent_doc_number] => 20230162778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-25 [patent_title] => APPARATUSES, SYSTEMS, AND METHODS FOR RESETTING ROW HAMMER DETECTOR CIRCUIT BASED ON SELF-REFRESH COMMAND [patent_app_type] => utility [patent_app_number] => 18/158316 [patent_app_country] => US [patent_app_date] => 2023-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10939 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18158316 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/158316
Apparatuses, systems, and methods for resetting row hammer detector circuit based on self-refresh command Jan 22, 2023 Issued
Array ( [id] => 19979001 [patent_doc_number] => 12346476 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => Method and electronic device for managing sensitive data based on semantic categorization [patent_app_type] => utility [patent_app_number] => 18/099940 [patent_app_country] => US [patent_app_date] => 2023-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1021 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18099940 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/099940
Method and electronic device for managing sensitive data based on semantic categorization Jan 20, 2023 Issued
Array ( [id] => 18950767 [patent_doc_number] => 11894070 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-06 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 18/156654 [patent_app_country] => US [patent_app_date] => 2023-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 24728 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18156654 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/156654
Semiconductor memory device Jan 18, 2023 Issued
Array ( [id] => 19320425 [patent_doc_number] => 20240241969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => Systems And Methods For Provisioning A Database Of Trusted Users Stored Within One Or More Information Handling Systems [patent_app_type] => utility [patent_app_number] => 18/098216 [patent_app_country] => US [patent_app_date] => 2023-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27755 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18098216 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/098216
Systems and methods for provisioning a database of trusted users stored within one or more information handling systems Jan 17, 2023 Issued
Array ( [id] => 19704727 [patent_doc_number] => 12198773 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-14 [patent_title] => Memory chip test method and apparatus, medium, and device [patent_app_type] => utility [patent_app_number] => 18/155676 [patent_app_country] => US [patent_app_date] => 2023-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6625 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18155676 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/155676
Memory chip test method and apparatus, medium, and device Jan 16, 2023 Issued
Array ( [id] => 18821819 [patent_doc_number] => 20230396160 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/097226 [patent_app_country] => US [patent_app_date] => 2023-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10549 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18097226 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/097226
Semiconductor device Jan 13, 2023 Issued
Array ( [id] => 19679100 [patent_doc_number] => 12190971 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-07 [patent_title] => Managing memory leakages of a system for evaluating manufactured items [patent_app_type] => utility [patent_app_number] => 18/095880 [patent_app_country] => US [patent_app_date] => 2023-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5305 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18095880 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/095880
Managing memory leakages of a system for evaluating manufactured items Jan 10, 2023 Issued
Array ( [id] => 18757227 [patent_doc_number] => 20230360685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => SEMICONDUCTOR STRUCTURE AND CHIP [patent_app_type] => utility [patent_app_number] => 18/151515 [patent_app_country] => US [patent_app_date] => 2023-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5779 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 309 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18151515 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/151515
Semiconductor structure and chip Jan 8, 2023 Issued
Array ( [id] => 19307260 [patent_doc_number] => 20240235841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => SYSTEM AND METHOD FOR PARALLEL MANUFACTURE AND VERIFICATION OF ONE-TIME-PASSWORD AUTHENTICATION CARDS [patent_app_type] => utility [patent_app_number] => 18/094238 [patent_app_country] => US [patent_app_date] => 2023-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7431 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18094238 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/094238
System and method for parallel manufacture and verification of one-time-password authentication cards Jan 5, 2023 Issued
Array ( [id] => 18394583 [patent_doc_number] => 20230162804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-25 [patent_title] => MEMORY INCLUDING A PLURALITY OF PORTIONS AND USED FOR REDUCING PROGRAM DISTURBANCE AND PROGRAM METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/094288 [patent_app_country] => US [patent_app_date] => 2023-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3549 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18094288 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/094288
Memory including a plurality of portions and used for reducing program disturbance and program method thereof Jan 5, 2023 Issued
Array ( [id] => 19145996 [patent_doc_number] => 20240145011 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => MEMORY DEVICE HAVING INTERFACE CHARGE TRAPS [patent_app_type] => utility [patent_app_number] => 18/149729 [patent_app_country] => US [patent_app_date] => 2023-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9888 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18149729 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/149729
Memory device having interface charge traps Jan 3, 2023 Issued
Array ( [id] => 18366824 [patent_doc_number] => 20230148416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => MEMORY DEVICE, METHOD FOR OPERATING MEMORY DEVICE, MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/090409 [patent_app_country] => US [patent_app_date] => 2022-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8408 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18090409 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/090409
Memory device, method for operating memory device, memory system Dec 27, 2022 Issued
Array ( [id] => 19670632 [patent_doc_number] => 12183399 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Memory device, programming method and memory system [patent_app_type] => utility [patent_app_number] => 18/147537 [patent_app_country] => US [patent_app_date] => 2022-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 12055 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18147537 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/147537
Memory device, programming method and memory system Dec 27, 2022 Issued
Array ( [id] => 19100762 [patent_doc_number] => 20240119990 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => DYNAMIC RANDOM ACCESS MEMORY REFRESH CIRCUIT AND REFRESH METHOD, AND PROOF-OF-WORK CHIP [patent_app_type] => utility [patent_app_number] => 18/264414 [patent_app_country] => US [patent_app_date] => 2022-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9097 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18264414 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/264414
Dynamic random access memory refresh circuit and refresh method, and proof-of-work chip Dec 25, 2022 Issued
Array ( [id] => 20529273 [patent_doc_number] => 12547710 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-10 [patent_title] => Attack means evaluation apparatus, attack means evaluation method, and computer readable medium [patent_app_type] => utility [patent_app_number] => 18/088453 [patent_app_country] => US [patent_app_date] => 2022-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1216 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18088453 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/088453
Attack means evaluation apparatus, attack means evaluation method, and computer readable medium Dec 22, 2022 Issued
Array ( [id] => 18335686 [patent_doc_number] => 20230127635 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-27 [patent_title] => MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/069685 [patent_app_country] => US [patent_app_date] => 2022-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10229 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18069685 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/069685
Memory device and memory system including the same Dec 20, 2022 Issued
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