Search

Arezoo Sherkat

Examiner (ID: 12013)

Most Active Art Unit
2434
Art Unit(s)
2494, IPBS, 2431, 2131, 2434
Total Applications
370
Issued Applications
274
Pending Applications
15
Abandoned Applications
81

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9014895 [patent_doc_number] => 20130229859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-05 [patent_title] => '8T SRAM CELL WITH ONE WORD LINE' [patent_app_type] => utility [patent_app_number] => 13/866369 [patent_app_country] => US [patent_app_date] => 2013-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7548 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13866369 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/866369
8T SRAM cell with one word line Apr 18, 2013 Issued
Array ( [id] => 10846084 [patent_doc_number] => 08873274 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-28 [patent_title] => 'Resistive memory cells and devices having asymmetrical contacts' [patent_app_type] => utility [patent_app_number] => 13/862918 [patent_app_country] => US [patent_app_date] => 2013-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 25 [patent_no_of_words] => 11124 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13862918 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/862918
Resistive memory cells and devices having asymmetrical contacts Apr 14, 2013 Issued
Array ( [id] => 10010266 [patent_doc_number] => 09053789 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-06-09 [patent_title] => 'Triggered cell annihilation for resistive switching memory devices' [patent_app_type] => utility [patent_app_number] => 13/859853 [patent_app_country] => US [patent_app_date] => 2013-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9873 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13859853 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/859853
Triggered cell annihilation for resistive switching memory devices Apr 9, 2013 Issued
Array ( [id] => 9092763 [patent_doc_number] => 20130272074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-17 [patent_title] => 'NONVOLATILE MEMORY, ELECTRONIC APPARATUS, AND VERIFICATION METHOD' [patent_app_type] => utility [patent_app_number] => 13/856205 [patent_app_country] => US [patent_app_date] => 2013-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11277 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13856205 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/856205
Nonvolatile memory, electronic apparatus, and verification method Apr 2, 2013 Issued
Array ( [id] => 10563316 [patent_doc_number] => 09286997 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-15 [patent_title] => 'Read only memory array architecture and methods of operation' [patent_app_type] => utility [patent_app_number] => 13/851673 [patent_app_country] => US [patent_app_date] => 2013-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7356 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13851673 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/851673
Read only memory array architecture and methods of operation Mar 26, 2013 Issued
Array ( [id] => 10112033 [patent_doc_number] => 09147451 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-29 [patent_title] => 'Memory device and method of controlling leakage current within such a memory device' [patent_app_type] => utility [patent_app_number] => 13/847743 [patent_app_country] => US [patent_app_date] => 2013-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 8321 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13847743 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/847743
Memory device and method of controlling leakage current within such a memory device Mar 19, 2013 Issued
Array ( [id] => 10112046 [patent_doc_number] => 09147464 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-09-29 [patent_title] => 'System architecture with multiple memory types, including programmable impedance memory elements' [patent_app_type] => utility [patent_app_number] => 13/846539 [patent_app_country] => US [patent_app_date] => 2013-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 38 [patent_no_of_words] => 9967 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13846539 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/846539
System architecture with multiple memory types, including programmable impedance memory elements Mar 17, 2013 Issued
Array ( [id] => 9002013 [patent_doc_number] => 20130223138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-29 [patent_title] => 'SECURE NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 13/836690 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4050 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13836690 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/836690
Secure non-volatile memory Mar 14, 2013 Issued
Array ( [id] => 9997580 [patent_doc_number] => 09042191 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-26 [patent_title] => 'Self-repairing memory' [patent_app_type] => utility [patent_app_number] => 13/840386 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6241 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13840386 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/840386
Self-repairing memory Mar 14, 2013 Issued
Array ( [id] => 9650424 [patent_doc_number] => 08804450 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-12 [patent_title] => 'Memory circuits having a diode-connected transistor with back-biased control' [patent_app_type] => utility [patent_app_number] => 13/790726 [patent_app_country] => US [patent_app_date] => 2013-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3423 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13790726 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/790726
Memory circuits having a diode-connected transistor with back-biased control Mar 7, 2013 Issued
Array ( [id] => 8926751 [patent_doc_number] => 20130182511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-18 [patent_title] => 'DIGITAL MEMORY SYSTEM THAT DYNAMICALLY ADJUSTS REFERENCE VOLTAGE AS A FUNCTION OF TRAFFIC INTENSITY' [patent_app_type] => utility [patent_app_number] => 13/785698 [patent_app_country] => US [patent_app_date] => 2013-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7959 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13785698 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/785698
Digital memory system that dynamically adjusts reference voltage as a function of traffic intensity Mar 4, 2013 Issued
Array ( [id] => 9061306 [patent_doc_number] => 08547749 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-01 [patent_title] => 'Multi-pass programming in a memory device' [patent_app_type] => utility [patent_app_number] => 13/775523 [patent_app_country] => US [patent_app_date] => 2013-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3593 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13775523 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/775523
Multi-pass programming in a memory device Feb 24, 2013 Issued
Array ( [id] => 8902338 [patent_doc_number] => 20130169841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-04 [patent_title] => 'SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 13/771043 [patent_app_country] => US [patent_app_date] => 2013-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10371 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13771043 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/771043
Semiconductor device and control method of the same Feb 18, 2013 Issued
Array ( [id] => 8826448 [patent_doc_number] => 20130127493 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-23 [patent_title] => 'NEAREST NEIGHBOR SERIAL CONTENT ADDRESSABLE MEMORY' [patent_app_type] => utility [patent_app_number] => 13/739618 [patent_app_country] => US [patent_app_date] => 2013-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4300 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13739618 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/739618
Nearest neighbor serial content addressable memory Jan 10, 2013 Issued
Array ( [id] => 10846088 [patent_doc_number] => 08873278 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-10-28 [patent_title] => 'Volatile memory elements with soft error upset immunity' [patent_app_type] => utility [patent_app_number] => 13/732737 [patent_app_country] => US [patent_app_date] => 2013-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 8010 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13732737 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/732737
Volatile memory elements with soft error upset immunity Jan 1, 2013 Issued
Array ( [id] => 9305252 [patent_doc_number] => 20140043926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-13 [patent_title] => 'DATA OUTPUT CIRCUIT OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/720805 [patent_app_country] => US [patent_app_date] => 2012-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3337 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13720805 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/720805
Data output circuit of semiconductor device Dec 18, 2012 Issued
Array ( [id] => 8820024 [patent_doc_number] => 20130121069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-16 [patent_title] => 'INTERNAL VOLTAGE GENERATING CIRCUIT OF PHASE CHANGE RANDOM ACCESS MEMORY DEVICE AND METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/713862 [patent_app_country] => US [patent_app_date] => 2012-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5529 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13713862 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/713862
Internal voltage generating circuit of phase change random access memory device and method thereof Dec 12, 2012 Issued
Array ( [id] => 9377295 [patent_doc_number] => 08681565 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-25 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/709995 [patent_app_country] => US [patent_app_date] => 2012-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 7953 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 394 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13709995 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/709995
Semiconductor memory device Dec 9, 2012 Issued
Array ( [id] => 10003860 [patent_doc_number] => 09047958 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-02 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/707851 [patent_app_country] => US [patent_app_date] => 2012-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 66 [patent_no_of_words] => 28001 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13707851 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/707851
Nonvolatile semiconductor memory device Dec 6, 2012 Issued
Array ( [id] => 10003860 [patent_doc_number] => 09047958 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-02 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/707851 [patent_app_country] => US [patent_app_date] => 2012-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 66 [patent_no_of_words] => 28001 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13707851 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/707851
Nonvolatile semiconductor memory device Dec 6, 2012 Issued
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